xref: /dragonfly/sys/dev/pccard/pccbb/pccbbvar.h (revision 0e6f0e2886bc8da263ff35cca55f08c8c57fac2d)
1 /*-
2  * Copyright (c) 2003-2004 Warner Losh.
3  * Copyright (c) 2000,2001 Jonathan Chen.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD: src/sys/dev/pccbb/pccbbvar.h,v 1.26 2005/10/08 06:58:51 imp Exp $
28  * $DragonFly: src/sys/dev/pccard/pccbb/pccbbvar.h,v 1.3 2007/07/05 12:08:54 sephe Exp $
29  */
30 
31 /*
32  * Structure definitions for the Cardbus Bridge driver
33  */
34 
35 struct cbb_intrhand {
36           driver_intr_t       *intr;
37           void                *arg;
38           struct cbb_softc *sc;
39           void                *cookie;
40           struct lwkt_serialize *serializer;
41 };
42 
43 struct cbb_reslist {
44           SLIST_ENTRY(cbb_reslist) link;
45           struct    resource *res;
46           int       type;
47           int       rid;
48                     /* note: unlike the regular resource list, there can be
49                      * duplicate rid's in the same list.  However, the
50                      * combination of rid and res->r_dev should be unique.
51                      */
52           bus_addr_t cardaddr; /* for 16-bit pccard memory */
53 };
54 
55 #define   CBB_AUTO_OPEN_SMALLHOLE 0x100
56 #define CBB_NSLOTS            4
57 
58 struct cbb_softc {
59           device_t  dev;
60           struct exca_softc exca[CBB_NSLOTS];
61           struct              resource *base_res;
62           struct              resource *irq_res;
63           void                *intrhand;
64           bus_space_tag_t bst;
65           bus_space_handle_t bsh;
66           u_int32_t domain;
67           u_int8_t  pribus;
68           u_int8_t  secbus;
69           u_int8_t  subbus;
70           u_int32_t flags;
71 #define CBB_CARD_OK           0x08000000
72 #define   CBB_16BIT_CARD                0x20000000
73 #define   CBB_KTHREAD_RUNNING 0x40000000
74 #define   CBB_KTHREAD_DONE    0x80000000
75           int                 chipset;            /* chipset id */
76 #define   CB_UNKNOWN          0                   /* NOT Cardbus-PCI bridge */
77 #define   CB_TI113X 1                   /* TI PCI1130/1131 */
78 #define   CB_TI12XX 2                   /* TI PCI12xx/14xx/44xx/15xx/45xx */
79 #define   CB_TI125X 3                   /* TI PCI1250/1251(B)/1450 */
80 #define   CB_RF5C47X          4                   /* RICOH RF5C475/476/477 */
81 #define   CB_RF5C46X          5                   /* RICOH RF5C465/466/467 */
82 #define   CB_CIRRUS 6                   /* Cirrus Logic CLPD683x */
83 #define   CB_TOPIC95          7                   /* Toshiba ToPIC95 */
84 #define   CB_TOPIC97          8                   /* Toshiba ToPIC97/100 */
85 #define   CB_O2MICRO          9                   /* O2Micro chips */
86           SLIST_HEAD(, cbb_reslist) rl;
87           device_t  cbdev;
88           struct thread       *event_thread;
89           void (*chipinit)(struct cbb_softc *);
90           volatile int        powerintr;
91 
92           int                 power_cv;
93           int                 generic_cv;
94 };
95 
96 /* result of detect_card */
97 #define   CARD_UKN_CARD       0x00
98 #define   CARD_5V_CARD        0x01
99 #define   CARD_3V_CARD        0x02
100 #define   CARD_XV_CARD        0x04
101 #define   CARD_YV_CARD        0x08
102 
103 /* for power_socket */
104 #define   CARD_VCC(X)         (X)
105 #define CARD_VPP_VCC          0xf0
106 #define CARD_VCCMASK          0xf
107 #define CARD_VCCSHIFT         0
108 #define XV                    2
109 #define YV                    1
110 
111 #define CARD_OFF    (CARD_VCC(0))
112 
113 extern int cbb_debug;
114 extern devclass_t cbb_devclass;
115 
116 int       cbb_activate_resource(device_t brdev, device_t child,
117               int type, int rid, struct resource *r);
118 struct resource     *cbb_alloc_resource(device_t brdev, device_t child,
119               int type, int *rid, u_long start, u_long end, u_long count,
120               u_int flags, int cpuid);
121 void      cbb_child_detached(device_t brdev, device_t child);
122 int       cbb_child_present(device_t self);
123 int       cbb_deactivate_resource(device_t brdev, device_t child,
124               int type, int rid, struct resource *r);
125 int       cbb_detach(device_t brdev);
126 void      cbb_disable_func_intr(struct cbb_softc *sc);
127 void      cbb_driver_added(device_t brdev, driver_t *driver);
128 void      cbb_event_thread(void *arg);
129 void      cbb_intr(void *arg);
130 int       cbb_maxslots(device_t brdev);
131 int       cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid,
132               uint32_t cardaddr, uint32_t *deltap);
133 int       cbb_pcic_set_res_flags(device_t brdev, device_t child, int type,
134               int rid, uint32_t flags);
135 int       cbb_power(device_t brdev, int volts);
136 int       cbb_power_enable_socket(device_t brdev, device_t child);
137 void      cbb_power_disable_socket(device_t brdev, device_t child);
138 uint32_t cbb_read_config(device_t brdev, int b, int s, int f,
139               int reg, int width);
140 int       cbb_read_ivar(device_t brdev, device_t child, int which,
141               uintptr_t *result);
142 int       cbb_release_resource(device_t brdev, device_t child,
143               int type, int rid, struct resource *r);
144 int       cbb_resume(device_t self);
145 int       cbb_setup_intr(device_t dev, device_t child, struct resource *irq,
146               int flags, driver_intr_t *intr, void *arg, void **cookiep,
147               lwkt_serialize_t serializer, const char *desc);
148 int       cbb_shutdown(device_t brdev);
149 int       cbb_suspend(device_t self);
150 int       cbb_teardown_intr(device_t dev, device_t child, struct resource *irq,
151               void *cookie);
152 void      cbb_write_config(device_t brdev, int b, int s, int f,
153               int reg, uint32_t val, int width);
154 int       cbb_write_ivar(device_t brdev, device_t child, int which,
155               uintptr_t value);
156 
157 /*
158  */
159 static __inline void
cbb_set(struct cbb_softc * sc,uint32_t reg,uint32_t val)160 cbb_set(struct cbb_softc *sc, uint32_t reg, uint32_t val)
161 {
162           bus_space_write_4(sc->bst, sc->bsh, reg, val);
163 }
164 
165 static __inline uint32_t
cbb_get(struct cbb_softc * sc,uint32_t reg)166 cbb_get(struct cbb_softc *sc, uint32_t reg)
167 {
168           return (bus_space_read_4(sc->bst, sc->bsh, reg));
169 }
170 
171 static __inline void
cbb_setb(struct cbb_softc * sc,uint32_t reg,uint32_t bits)172 cbb_setb(struct cbb_softc *sc, uint32_t reg, uint32_t bits)
173 {
174           cbb_set(sc, reg, cbb_get(sc, reg) | bits);
175 }
176 
177 static __inline void
cbb_clrb(struct cbb_softc * sc,uint32_t reg,uint32_t bits)178 cbb_clrb(struct cbb_softc *sc, uint32_t reg, uint32_t bits)
179 {
180           cbb_set(sc, reg, cbb_get(sc, reg) & ~bits);
181 }
182