| /freebsd-9-stable/contrib/llvm/lib/Target/X86/ |
| D | X86CodeEmitter.cpp | 484 unsigned BaseReg = Base.getReg(); in emitMemModRMByte() local
615 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is16BitMemOperand() local
629 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand() local
644 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is64BitMemOperand() local
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| D | X86AsmPrinter.cpp | 272 const MachineOperand &BaseReg = MI->getOperand(Op); in printLeaMemReference() local
331 const MachineOperand &BaseReg = MI->getOperand(Op); in printIntelMemReference() local
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| D | X86InstrInfo.cpp | 1619 static bool regIsPICBase(unsigned BaseReg, const MachineRegisterInfo &MRI) { in regIsPICBase()
1675 unsigned BaseReg = MI->getOperand(1).getReg(); in isReallyTriviallyReMaterializable() local
1696 unsigned BaseReg = MI->getOperand(1).getReg(); in isReallyTriviallyReMaterializable() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCCodeEmitter.cpp | 221 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand() local
236 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is64BitMemOperand() local
251 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is16BitMemOperand() local
374 unsigned BaseReg = Base.getReg(); in EmitMemModRMByte() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/ARM/ |
| D | Thumb1RegisterInfo.cpp | 93 unsigned DestReg, unsigned BaseReg, in emitThumbRegPlusImmInReg()
170 unsigned DestReg, unsigned BaseReg, in emitThumbRegPlusImmediate()
489 unsigned BaseReg, int64_t Offset) const { in resolveFrameIndex()
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| D | Thumb2SizeReduction.cpp | 420 unsigned BaseReg = MI->getOperand(0).getReg(); in ReduceLoadStore() local
442 unsigned BaseReg = MI->getOperand(1).getReg(); in ReduceLoadStore() local
456 unsigned BaseReg = MI->getOperand(1).getReg(); in ReduceLoadStore() local
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| D | ARMBaseRegisterInfo.cpp | 569 unsigned BaseReg, int FrameIdx, in materializeFrameBaseRegister()
595 unsigned BaseReg, int64_t Offset) const { in resolveFrameIndex()
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| D | ARMLoadStoreOptimizer.cpp | 1157 unsigned BaseReg, bool BaseKill, bool BaseUndef, in InsertLDR_STR()
1183 unsigned BaseReg = BaseOp.getReg(); in FixInvalidRegPairOp() local
1658 unsigned &OddReg, unsigned &BaseReg, in CanFormLdStDWord()
1821 unsigned BaseReg = 0, PredReg = 0; in RescheduleOps() local
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| D | Thumb2InstrInfo.cpp | 215 unsigned DestReg, unsigned BaseReg, int NumBytes, in emitT2RegPlusImmediate()
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| D | ARMISelDAGToDAG.cpp | 469 SDValue &BaseReg, in SelectImmShifterOperand()
492 SDValue &BaseReg, in SelectRegShifterOperand()
1242 bool ARMDAGToDAGISel::SelectT2ShifterOperandReg(SDValue N, SDValue &BaseReg, in SelectT2ShifterOperandReg()
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| D | ARMBaseInstrInfo.cpp | 159 unsigned BaseReg = Base.getReg(); in convertToThreeAddress() local
1826 unsigned DestReg, unsigned BaseReg, int NumBytes, in emitARMRegPlusImmediate()
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| /freebsd-9-stable/contrib/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.cpp | 140 unsigned BaseReg = in eliminateFrameIndex() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/X86/InstPrinter/ |
| D | X86IntelInstPrinter.cpp | 154 const MCOperand &BaseReg = MI->getOperand(Op); in printMemReference() local
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| D | X86ATTInstPrinter.cpp | 175 const MCOperand &BaseReg = MI->getOperand(Op); in printMemReference() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 796 unsigned BaseReg, int FrameIdx, in materializeFrameBaseRegister()
817 unsigned BaseReg, int64_t Offset) const { in resolveFrameIndex()
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| /freebsd-9-stable/contrib/llvm/include/llvm/Target/ |
| D | TargetRegisterInfo.h | 743 unsigned BaseReg, int FrameIdx, in materializeFrameBaseRegister()
752 unsigned BaseReg, int64_t Offset) const { in resolveFrameIndex()
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| D | TargetInstrInfo.h | 630 unsigned &BaseReg, unsigned &Offset, in getLdStBaseRegImmOfs()
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| /freebsd-9-stable/contrib/llvm/lib/CodeGen/ |
| D | LocalStackSlotAllocation.cpp | 271 unsigned BaseReg = 0; in insertFrameReferenceRegisters() local
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| D | MachineScheduler.cpp | 987 unsigned BaseReg; member
1021 unsigned BaseReg; in clusterNeighboringLoads() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 204 unsigned BaseReg, IndexReg, TmpReg, Scale; member in __anon1116e90c0111::X86AsmParser::IntelExprStateMachine
642 unsigned BaseReg; member
1180 unsigned BaseReg, unsigned IndexReg, in CreateMemForInlineAsm()
1412 int BaseReg = SM.getBaseReg(); in ParseIntelBracExpression() local
1824 unsigned BaseReg = 0, IndexReg = 0, Scale = 1; in ParseMemOperand() local
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| /freebsd-9-stable/contrib/llvm/tools/clang/lib/StaticAnalyzer/Core/ |
| D | Store.cpp | 285 const MemRegion *BaseReg = in evalDerivedToBase() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/R600/ |
| D | AMDGPUISelDAGToDAG.cpp | 463 SDValue& BaseReg, SDValue &Offset) { in SelectGlobalValueVariableOffset()
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| /freebsd-9-stable/contrib/llvm/lib/Transforms/Scalar/ |
| D | CodeGenPrepare.cpp | 822 Value *BaseReg; member
1378 Value *BaseReg = AMAfter.BaseReg, *ScaledReg = AMAfter.ScaledReg; in IsProfitableToFoldIntoAddressingMode() local
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| D | LoopStrengthReduce.cpp | 937 const SCEV *BaseReg = *I; in RateFormula() local
3200 const SCEV *BaseReg = Base.BaseRegs[i]; in GenerateReassociations() local
3283 const SCEV *BaseReg = *I; in GenerateCombinations() local
3697 const SCEV *BaseReg = F.BaseRegs[N]; in GenerateCrossUseConstantOffsets() local
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| /freebsd-9-stable/contrib/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 495 unsigned BaseReg = 0; in parseMEMOperand() local
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