1 /*-
2 * Copyright (c) 2005 Olivier Houchard. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 *
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 */
25
26 /* $FreeBSD$ */
27
28 #ifndef _AT91VAR_H_
29 #define _AT91VAR_H_
30
31 #include <sys/bus.h>
32 #include <sys/rman.h>
33
34 #include <arm/at91/at91reg.h>
35
36 struct at91_softc {
37 device_t dev;
38 bus_space_tag_t sc_st;
39 bus_space_handle_t sc_sh;
40 bus_space_handle_t sc_aic_sh;
41 struct rman sc_irq_rman;
42 struct rman sc_mem_rman;
43 };
44
45 struct at91_ivar {
46 struct resource_list resources;
47 };
48
49 struct cpu_devs
50 {
51 const char *name;
52 int unit;
53 bus_addr_t mem_base;
54 bus_size_t mem_len;
55 int irq0;
56 int irq1;
57 int irq2;
58 const char *parent_clk;
59 };
60
61 enum at91_soc_type {
62 AT91_T_NONE = 0,
63 AT91_T_CAP9,
64 AT91_T_RM9200,
65 AT91_T_SAM9260,
66 AT91_T_SAM9261,
67 AT91_T_SAM9263,
68 AT91_T_SAM9G10,
69 AT91_T_SAM9G20,
70 AT91_T_SAM9G45,
71 AT91_T_SAM9N12,
72 AT91_T_SAM9RL,
73 AT91_T_SAM9X5,
74 };
75
76 enum at91_soc_subtype {
77 AT91_ST_ANY = -1, /* Match any type */
78 AT91_ST_NONE = 0,
79 /* AT91RM9200 */
80 AT91_ST_RM9200_BGA,
81 AT91_ST_RM9200_PQFP,
82 /* AT91SAM9260 */
83 AT91_ST_SAM9XE,
84 /* AT91SAM9G45 */
85 AT91_ST_SAM9G45,
86 AT91_ST_SAM9M10,
87 AT91_ST_SAM9G46,
88 AT91_ST_SAM9M11,
89 /* AT91SAM9X5 */
90 AT91_ST_SAM9G15,
91 AT91_ST_SAM9G25,
92 AT91_ST_SAM9G35,
93 AT91_ST_SAM9X25,
94 AT91_ST_SAM9X35,
95 };
96
97 enum at91_soc_family {
98 AT91_FAMILY_SAM9 = 0x19,
99 AT91_FAMILY_SAM9XE = 0x29,
100 AT91_FAMILY_RM92 = 0x92,
101 };
102
103 #define AT91_SOC_NAME_MAX 50
104
105 typedef void (*DELAY_t)(int);
106 typedef void (*cpu_reset_t)(void);
107 typedef void (*clk_init_t)(void);
108
109 struct at91_soc_data {
110 DELAY_t soc_delay; /* SoC specific delay function */
111 cpu_reset_t soc_reset; /* SoC specific reset function */
112 clk_init_t soc_clock_init; /* SoC specific clock init function */
113 const int *soc_irq_prio; /* SoC specific IRQ priorities */
114 const struct cpu_devs *soc_children; /* SoC specific children list */
115 const uint32_t *soc_pio_base; /* SoC specific PIO base registers */
116 size_t soc_pio_count; /* Count of PIO units (not pins) in SoC */
117 };
118
119 struct at91_soc_info {
120 enum at91_soc_type type;
121 enum at91_soc_subtype subtype;
122 enum at91_soc_family family;
123 uint32_t cidr;
124 uint32_t exid;
125 char name[AT91_SOC_NAME_MAX];
126 uint32_t dbgu_base;
127 struct at91_soc_data *soc_data;
128 };
129
130 extern struct at91_soc_info soc_info;
131
132 static inline int at91_is_rm92(void);
133 static inline int at91_is_sam9(void);
134 static inline int at91_is_sam9xe(void);
135 static inline int at91_cpu_is(u_int cpu);
136
137 static inline int
at91_is_rm92(void)138 at91_is_rm92(void)
139 {
140
141 return (soc_info.type == AT91_T_RM9200);
142 }
143
144 static inline int
at91_is_sam9(void)145 at91_is_sam9(void)
146 {
147
148 return (soc_info.family == AT91_FAMILY_SAM9);
149 }
150
151 static inline int
at91_is_sam9xe(void)152 at91_is_sam9xe(void)
153 {
154
155 return (soc_info.family == AT91_FAMILY_SAM9XE);
156 }
157
158 static inline int
at91_cpu_is(u_int cpu)159 at91_cpu_is(u_int cpu)
160 {
161
162 return (soc_info.type == cpu);
163 }
164
165 void at91_add_child(device_t dev, int prio, const char *name, int unit,
166 bus_addr_t addr, bus_size_t size, int irq0, int irq1, int irq2);
167
168 extern uint32_t at91_irq_system;
169 extern uint32_t at91_master_clock;
170 void at91_pmc_init_clock(void);
171 void at91_soc_id(void);
172
173 #endif /* _AT91VAR_H_ */
174