Lines Matching refs:uart_getreg
141 while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_THRE)); in rt305x_uart_putc()
144 while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_THRE)); in rt305x_uart_putc()
151 if (uart_getreg(bas, UART_LSR_REG) & UART_LSR_DR) in rt305x_uart_rxready()
167 while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_DR)) { in rt305x_uart_getc()
173 c = uart_getreg(bas, UART_RX_REG); in rt305x_uart_getc()
243 cr = uart_getreg(bas, UART_IER_REG); in rt305x_uart_disable_txintr()
258 cr = uart_getreg(bas, UART_IER_REG); in rt305x_uart_enable_txintr()
283 uart_getreg(bas, UART_FCR_REG) | in rt305x_uart_bus_attach()
305 uint32_t fcr = uart_getreg(bas, UART_FCR_REG); in rt305x_uart_bus_flush()
329 bes = uart_getreg(&sc->sc_bas, UART_MSR_REG); in rt305x_uart_bus_getsig()
355 divisor = uart_getreg(bas, UART_CDDL_REG); in rt305x_uart_bus_ioctl()
378 iir = uart_getreg(&sc->sc_bas, UART_IIR_REG); in rt305x_uart_bus_ipend()
379 lsr = uart_getreg(&sc->sc_bas, UART_LSR_REG); in rt305x_uart_bus_ipend()
381 msr = uart_getreg(&sc->sc_bas, UART_MSR_REG); in rt305x_uart_bus_ipend()
460 lsr = uart_getreg(bas, UART_LSR_REG); in rt305x_uart_bus_receive()
467 xc = uart_getreg(bas, UART_RX_REG); in rt305x_uart_bus_receive()
476 lsr = uart_getreg(bas, UART_LSR_REG); in rt305x_uart_bus_receive()
501 while ((uart_getreg(bas, UART_LSR_REG) & UART_LSR_THRE) == 0) in rt305x_uart_bus_transmit()