Lines Matching refs:assigned

436 			assigned-clocks = <&clock CLK_MOUT_FIMC0>,
438 			assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
439 			assigned-clock-rates = <0>, <160000000>;
444 			assigned-clocks = <&clock CLK_MOUT_FIMC1>,
446 			assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
447 			assigned-clock-rates = <0>, <160000000>;
452 			assigned-clocks = <&clock CLK_MOUT_FIMC2>,
454 			assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
455 			assigned-clock-rates = <0>, <160000000>;
460 			assigned-clocks = <&clock CLK_MOUT_FIMC3>,
462 			assigned-clock-parents = <&clock CLK_SCLK_MPLL>;
463 			assigned-clock-rates = <0>, <160000000>;