Lines Matching refs:_sc
237 #define CSR_WRITE_4(_sc, reg, val) \ argument
238 bus_write_4((_sc)->age_res[0], (reg), (val))
239 #define CSR_WRITE_2(_sc, reg, val) \ argument
240 bus_write_2((_sc)->age_res[0], (reg), (val))
241 #define CSR_READ_2(_sc, reg) \ argument
242 bus_read_2((_sc)->age_res[0], (reg))
243 #define CSR_READ_4(_sc, reg) \ argument
244 bus_read_4((_sc)->age_res[0], (reg))
246 #define AGE_LOCK(_sc) mtx_lock(&(_sc)->age_mtx) argument
247 #define AGE_UNLOCK(_sc) mtx_unlock(&(_sc)->age_mtx) argument
248 #define AGE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->age_mtx, MA_OWNED) argument
251 #define AGE_COMMIT_MBOX(_sc) \ argument
253 CSR_WRITE_4(_sc, AGE_MBOX, \
254 (((_sc)->age_cdata.age_rx_cons << MBOX_RD_PROD_IDX_SHIFT) & \
256 (((_sc)->age_cdata.age_rr_cons << \
258 (((_sc)->age_cdata.age_tx_prod << MBOX_TD_PROD_IDX_SHIFT) & \
262 #define AGE_RXCHAIN_RESET(_sc) \ argument
264 (_sc)->age_cdata.age_rxhead = NULL; \
265 (_sc)->age_cdata.age_rxtail = NULL; \
266 (_sc)->age_cdata.age_rxprev_tail = NULL; \
267 (_sc)->age_cdata.age_rxlen = 0; \