Lines Matching refs:shl
119 def : Pat <(i32 (zext (i1 (setne (i32 (and (i32 (shl 1, (i32 IntRegs:$src2))),
293 (shl IntRegs:$src2, u2ImmPred:$offset)))),
299 (shl IntRegs:$src2, u2ImmPred:$offset)))),
305 (shl IntRegs:$src2, u2ImmPred:$offset)))),
311 (shl IntRegs:$src2, u2ImmPred:$offset)))),
317 (shl IntRegs:$src2, u2ImmPred:$offset)))),
323 (shl IntRegs:$src2, u2ImmPred:$offset)))),
329 (shl IntRegs:$src2, u2ImmPred:$offset)))),
335 (shl IntRegs:$src2, u2ImmPred:$offset)))),
584 (add IntRegs:$src1, (shl IntRegs:$src2,
590 (add IntRegs:$src1, (shl IntRegs:$src2,
596 (add IntRegs:$src1, (shl IntRegs:$src2, u2ImmPred:$src3))),
601 (add IntRegs:$src1, (shl IntRegs:$src2, u2ImmPred:$src3))),
612 (add (shl (i32 IntRegs:$src1), u2ImmPred:$src2),
644 (add (shl IntRegs:$src1, u2ImmPred:$src2),
1599 (add (shl (i32 IntRegs:$src2), u5ImmPred:$src3),
1623 (sub (shl (i32 IntRegs:$src2), u5ImmPred:$src3),
1649 (and (shl (i32 IntRegs:$src2), u5ImmPred:$src3),
1673 (or (shl (i32 IntRegs:$src2), u5ImmPred:$src3),
1696 [(set (i32 IntRegs:$dst), (shl s6ImmPred:$src1,
1707 (xor (i64 DoubleRegs:$src1), (shl (i64 DoubleRegs:$src2),
1727 (shl (i64 DoubleRegs:$src2),
2212 (seteq (shl (i32 IntRegs:$src1), (i32 24)),
2213 (shl (i32 IntRegs:$src2), (i32 24))))]>,
2222 (setgt (shl (i32 IntRegs:$src1), (i32 24)),
2223 (shl (i32 IntRegs:$src2), (i32 24))))]>,
2491 (seteq (shl (i32 IntRegs:$src1), (i32 16)),
2492 (shl (i32 IntRegs:$src2), (i32 16))))]>,
2506 (setgt (shl (i32 IntRegs:$src1), (i32 16)),
2518 (setgt (shl (i32 IntRegs:$src1), (i32 16)),
2519 (shl (i32 IntRegs:$src2), (i32 16))))]>,
2550 (seteq (and (shl 1, (i32 IntRegs:$src2)), (i32 IntRegs:$src1)), 0))]>,
2557 (seteq (and (shl 1, u5ImmPred:$src2), (i32 IntRegs:$src1)), 0))]>,
3116 (load (add (shl IntRegs:$src1, u2ImmPred:$src2),
3128 (i32 (OpNode (add (shl IntRegs:$src1, u2ImmPred:$src2),