Lines Matching refs:getReg
63 if (RI->getDwarfRegNum(MLoc.getReg(), false) != -1) { in EmitDwarfRegOp()
69 unsigned Reg = MLoc.getReg(); in EmitDwarfRegOp()
175 unsigned Reg = MO.getReg(); in printOperand()
263 << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg()) in PrintAsmOperand()
279 unsigned Reg = MI->getOperand(OpNum).getReg(); in PrintAsmOperand()
306 unsigned RegBegin = MO.getReg(); in PrintAsmOperand()
326 << ARMInstPrinter::getRegisterName(MI->getOperand(RegOps).getReg()); in PrintAsmOperand()
369 unsigned Reg = TRI->getSubReg(MO.getReg(), ExtraCode[0] == 'Q' ? in PrintAsmOperand()
382 unsigned Reg = MO.getReg(); in PrintAsmOperand()
391 unsigned Reg = MI->getOperand(OpNum).getReg(); in PrintAsmOperand()
410 unsigned Reg = MO.getReg(); in PrintAsmOperand()
438 O << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg()); in PrintAsmMemoryOperand()
445 O << "[" << ARMInstPrinter::getRegisterName(MO.getReg()) << "]"; in PrintAsmMemoryOperand()
987 SrcReg = MI->getOperand(1).getReg(); in EmitUnwindingInstruction()
988 DstReg = MI->getOperand(0).getReg(); in EmitUnwindingInstruction()
1022 RegList.push_back(MO.getReg()); in EmitUnwindingInstruction()
1028 assert(MI->getOperand(2).getReg() == ARM::SP && in EmitUnwindingInstruction()
1140 .addReg(MI->getOperand(0).getReg()) in EmitInstruction()
1144 .addReg(MI->getOperand(3).getReg())); in EmitInstruction()
1157 .addReg(MI->getOperand(0).getReg()) in EmitInstruction()
1161 .addReg(MI->getOperand(4).getReg())); in EmitInstruction()
1177 .addReg(MI->getOperand(0).getReg())); in EmitInstruction()
1189 .addReg(MI->getOperand(0).getReg()) in EmitInstruction()
1207 .addReg(MI->getOperand(0).getReg()) in EmitInstruction()
1239 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1276 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1277 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); in EmitInstruction()
1321 .addReg(MI->getOperand(0).getReg()) in EmitInstruction()
1322 .addReg(MI->getOperand(0).getReg()) in EmitInstruction()
1342 .addReg(MI->getOperand(0).getReg()) in EmitInstruction()
1344 .addReg(MI->getOperand(1).getReg()) in EmitInstruction()
1347 .addReg(MI->getOperand(4).getReg()) in EmitInstruction()
1386 .addReg(MI->getOperand(0).getReg()) in EmitInstruction()
1388 .addReg(MI->getOperand(1).getReg()) in EmitInstruction()
1392 .addReg(MI->getOperand(4).getReg())); in EmitInstruction()
1424 .addReg(MI->getOperand(0).getReg()) in EmitInstruction()
1437 .addReg(MI->getOperand(0).getReg()) in EmitInstruction()
1452 .addReg(MI->getOperand(0).getReg()) in EmitInstruction()
1470 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1491 if (MI->getOperand(1).getReg() == 0) { in EmitInstruction()
1495 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1500 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1501 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); in EmitInstruction()
1518 .addReg(MI->getOperand(0).getReg()) in EmitInstruction()
1519 .addReg(MI->getOperand(1).getReg()) in EmitInstruction()
1572 unsigned SrcReg = MI->getOperand(0).getReg(); in EmitInstruction()
1573 unsigned ValReg = MI->getOperand(1).getReg(); in EmitInstruction()
1638 unsigned SrcReg = MI->getOperand(0).getReg(); in EmitInstruction()
1639 unsigned ValReg = MI->getOperand(1).getReg(); in EmitInstruction()
1695 unsigned SrcReg = MI->getOperand(0).getReg(); in EmitInstruction()
1696 unsigned ScratchReg = MI->getOperand(1).getReg(); in EmitInstruction()
1734 unsigned SrcReg = MI->getOperand(0).getReg(); in EmitInstruction()
1735 unsigned ScratchReg = MI->getOperand(1).getReg(); in EmitInstruction()