122   TRI(MF.getTarget().getRegisterInfo()),  in AggressiveAntiDepBreaker()
128     BitVector CPSet = TRI->getAllocatableSet(MF, CriticalPathRCs[i]);  in AggressiveAntiDepBreaker()
138           dbgs() << " " << TRI->getName(r));  in AggressiveAntiDepBreaker()
148   State = new AggressiveAntiDepState(TRI->getNumRegs(), BB);  in StartBlock()
159       for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) {  in StartBlock()
172   for (const uint16_t *I = TRI->getCalleeSavedRegs(&MF); *I; ++I) {  in StartBlock()
175     for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {  in StartBlock()
203   for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) {  in Observe()
212               dbgs() << " " << TRI->getName(Reg) << "=g" <<  in Observe()
250       for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);  in GetPassthruRegs()
313         dbgs() << header << TRI->getName(Reg); header = NULL; });  in HandleLastUse()
317   for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {  in HandleLastUse()
325           dbgs() << header << TRI->getName(Reg); header = NULL; });  in HandleLastUse()
326       DEBUG(dbgs() << " " << TRI->getName(SubregReg) << "->g" <<  in HandleLastUse()
362     DEBUG(dbgs() << " " << TRI->getName(Reg) << "=g" << State->GetGroup(Reg));  in PrescanInstruction()
375     for (MCRegAliasIterator AI(Reg, TRI, false); AI.isValid(); ++AI) {  in PrescanInstruction()
380               TRI->getName(AliasReg) << ")");  in PrescanInstruction()
387       RC = TII->getRegClass(MI->getDesc(), i, TRI, MF);  in PrescanInstruction()
406     for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)  in PrescanInstruction()
445     DEBUG(dbgs() << " " << TRI->getName(Reg) << "=g" <<  in ScanInstruction()
461       RC = TII->getRegClass(MI->getDesc(), i, TRI, MF);  in ScanInstruction()
481         DEBUG(dbgs() << "=" << TRI->getName(Reg));  in ScanInstruction()
484         DEBUG(dbgs() << " " << TRI->getName(Reg));  in ScanInstruction()
494   BitVector BV(TRI->getNumRegs(), false);  in GetRenameRegisters()
511     BitVector RCBV = TRI->getAllocatableSet(MF, RC);  in GetRenameRegisters()
552     if ((SuperReg == 0) || TRI->isSuperRegister(SuperReg, Reg))  in FindSuitableFreeRegisters()
557       DEBUG(dbgs() << "\t\t" << TRI->getName(Reg) << ":");  in FindSuitableFreeRegisters()
564               dbgs() << " " << TRI->getName(r));  in FindSuitableFreeRegisters()
573     bool IsSub = TRI->isSubRegister(SuperReg, Reg);  in FindSuitableFreeRegisters()
586     dbgs() << "*** Performing rename " << TRI->getName(SuperReg) <<  in FindSuitableFreeRegisters()
600     TRI->getMinimalPhysRegClass(SuperReg, MVT::Other);  in FindSuitableFreeRegisters()
625     DEBUG(dbgs() << " [" << TRI->getName(NewSuperReg) << ':');  in FindSuitableFreeRegisters()
637         unsigned NewSubRegIdx = TRI->getSubRegIndex(SuperReg, Reg);  in FindSuitableFreeRegisters()
639           NewReg = TRI->getSubReg(NewSuperReg, NewSubRegIdx);  in FindSuitableFreeRegisters()
642       DEBUG(dbgs() << " " << TRI->getName(NewReg));  in FindSuitableFreeRegisters()
660         for (MCRegAliasIterator AI(NewReg, TRI, false); AI.isValid(); ++AI) {  in FindSuitableFreeRegisters()
664             DEBUG(dbgs() << "(alias " << TRI->getName(AliasReg) << " live)");  in FindSuitableFreeRegisters()
745   for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) {  in BreakAntiDependencies()
747       DEBUG(dbgs() << " " << TRI->getName(Reg));  in BreakAntiDependencies()
801         DEBUG(dbgs() << "\tAntidep reg: " << TRI->getName(AntiDepReg));  in BreakAntiDependencies()
882                 << TRI->getName(AntiDepReg) << ":");  in BreakAntiDependencies()
890             DEBUG(dbgs() << " " << TRI->getName(CurrReg) << "->" <<  in BreakAntiDependencies()
891                   TRI->getName(NewReg) << "(" <<  in BreakAntiDependencies()