Lines Matching refs:drive

1994 	int drive;  in pciide_channel_dma_setup()  local
1998 for (drive = 0; drive < 2; drive++) { in pciide_channel_dma_setup()
1999 drvp = &cp->wdc_channel.ch_drive[drive]; in pciide_channel_dma_setup()
2010 if (pciide_dma_table_setup(sc, cp->wdc_channel.channel, drive) in pciide_channel_dma_setup()
2020 pciide_dma_table_setup(struct pciide_softc *sc, int channel, int drive) in pciide_dma_table_setup() argument
2027 &sc->pciide_channels[channel].dma_maps[drive]; in pciide_dma_table_setup()
2039 channel, drive, error); in pciide_dma_table_setup()
2049 channel, drive, error); in pciide_dma_table_setup()
2063 channel, drive, error); in pciide_dma_table_setup()
2072 channel, drive, error); in pciide_dma_table_setup()
2084 channel, drive, error); in pciide_dma_table_setup()
2091 pciide_dma_init(void *v, int channel, int drive, void *databuf, in pciide_dma_init() argument
2098 &sc->pciide_channels[channel].dma_maps[drive]; in pciide_dma_init()
2109 channel, drive, error); in pciide_dma_init()
2173 pciide_dma_start(void *v, int channel, int drive) in pciide_dma_start() argument
2185 pciide_dma_finish(void *v, int channel, int drive, int force) in pciide_dma_finish() argument
2192 &sc->pciide_channels[channel].dma_maps[drive]; in pciide_dma_finish()
2222 sc->sc_wdcdev.sc_dev.dv_xname, channel, drive, status); in pciide_dma_finish()
2229 drive, status); in pciide_dma_finish()
2405 int channel, drive; in default_chip_map() local
2508 for (drive = 0; drive < 2; drive++) { in default_chip_map()
2509 drvp = &cp->wdc_channel.ch_drive[drive]; in default_chip_map()
2515 if (pciide_dma_table_setup(sc, channel, drive) != 0) { in default_chip_map()
2520 channel, drive); in default_chip_map()
2525 channel, drive); in default_chip_map()
2526 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in default_chip_map()
2602 int drive; in sata_setup_channel() local
2612 for (drive = 0; drive < 2; drive++) { in sata_setup_channel()
2613 drvp = &chp->ch_drive[drive]; in sata_setup_channel()
2620 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in sata_setup_channel()
2622 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in sata_setup_channel()
2910 u_int8_t mode[2], drive; in piix_setup_channel() local
2979 for (drive = 0; drive < 2; drive++) { in piix_setup_channel()
2980 if (drvp[drive].drive_flags & DRIVE_DMA) { in piix_setup_channel()
2982 mode[drive], 1, chp->channel); in piix_setup_channel()
2997 for (drive = 0; drive < 2; drive++) { in piix_setup_channel()
2999 if ((drvp[drive].drive_flags & DRIVE) == 0) in piix_setup_channel()
3001 idetim |= piix_setup_idetim_drvs(&drvp[drive]); in piix_setup_channel()
3002 if (drvp[drive].drive_flags & DRIVE_DMA) in piix_setup_channel()
3003 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in piix_setup_channel()
3022 int drive; in piix3_4_setup_channel() local
3043 for (drive = 0; drive < 2; drive++) { in piix3_4_setup_channel()
3044 udmareg &= ~(PIIX_UDMACTL_DRV_EN(channel, drive) | in piix3_4_setup_channel()
3045 PIIX_UDMATIM_SET(0x3, channel, drive)); in piix3_4_setup_channel()
3046 drvp = &chp->ch_drive[drive]; in piix3_4_setup_channel()
3087 (ideconf & PIIX_CONFIG_CR(channel, drive)) == 0) in piix3_4_setup_channel()
3090 ideconf |= PIIX_CONFIG_UDMA100(channel, drive); in piix3_4_setup_channel()
3092 ideconf &= ~PIIX_CONFIG_UDMA100(channel, drive); in piix3_4_setup_channel()
3095 drive); in piix3_4_setup_channel()
3098 drive); in piix3_4_setup_channel()
3106 (ideconf & PIIX_CONFIG_CR(channel, drive)) == 0) in piix3_4_setup_channel()
3109 ideconf |= PIIX_CONFIG_UDMA66(channel, drive); in piix3_4_setup_channel()
3111 ideconf &= ~PIIX_CONFIG_UDMA66(channel, drive); in piix3_4_setup_channel()
3118 udmareg |= PIIX_UDMACTL_DRV_EN( channel, drive); in piix3_4_setup_channel()
3120 piix4_sct_udma[drvp->UDMA_mode], channel, drive); in piix3_4_setup_channel()
3124 if (drive == 0) { in piix3_4_setup_channel()
3134 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in piix3_4_setup_channel()
3138 if (drive == 0) { in piix3_4_setup_channel()
3186 u_int8_t drive = drvp->drive; in piix_setup_idetim_drvs() local
3199 ret = PIIX_IDETIM_SET(ret, PIIX_IDETIM_TIME(drive), channel); in piix_setup_idetim_drvs()
3211 ret = PIIX_IDETIM_SET(ret, PIIX_IDETIM_DTE(drive), in piix_setup_idetim_drvs()
3226 ret = PIIX_IDETIM_SET(ret, PIIX_IDETIM_TIME(drive), channel); in piix_setup_idetim_drvs()
3228 ret = PIIX_IDETIM_SET(ret, PIIX_IDETIM_IE(drive), channel); in piix_setup_idetim_drvs()
3229 ret = PIIX_IDETIM_SET(ret, PIIX_IDETIM_PPE(drive), channel); in piix_setup_idetim_drvs()
3323 int mode, drive; in amd756_setup_channel() local
3344 for (drive = 0; drive < 2; drive++) { in amd756_setup_channel()
3345 drvp = &chp->ch_drive[drive]; in amd756_setup_channel()
3362 drive)) == 0 && drvp->UDMA_mode > 2) { in amd756_setup_channel()
3366 chp->channel, drive), DEBUG_PROBE); in amd756_setup_channel()
3370 udmatim_reg |= AMD756_UDMA_EN(chp->channel, drive) | in amd756_setup_channel()
3371 AMD756_UDMA_EN_MTH(chp->channel, drive) | in amd756_setup_channel()
3372 AMD756_UDMA_TIME(chp->channel, drive, in amd756_setup_channel()
3390 chp->channel, drive); in amd756_setup_channel()
3402 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in amd756_setup_channel()
3414 AMD756_DATATIM_PULSE(chp->channel, drive, in amd756_setup_channel()
3416 AMD756_DATATIM_RECOV(chp->channel, drive, in amd756_setup_channel()
3605 int mode, drive; in apollo_setup_channel() local
3637 for (drive = 0; drive < 2; drive++) { in apollo_setup_channel()
3638 drvp = &chp->ch_drive[drive]; in apollo_setup_channel()
3652 udmatim_reg |= APO_UDMA_EN(chp->channel, drive) | in apollo_setup_channel()
3653 APO_UDMA_EN_MTH(chp->channel, drive); in apollo_setup_channel()
3656 drive, apollo_udma133_tim[drvp->UDMA_mode]); in apollo_setup_channel()
3660 drive, apollo_udma100_tim[drvp->UDMA_mode]); in apollo_setup_channel()
3665 drive, apollo_udma66_tim[drvp->UDMA_mode]); in apollo_setup_channel()
3669 drive, apollo_udma33_tim[drvp->UDMA_mode]); in apollo_setup_channel()
3682 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in apollo_setup_channel()
3694 APO_DATATIM_PULSE(chp->channel, drive, in apollo_setup_channel()
3696 APO_DATATIM_RECOV(chp->channel, drive, in apollo_setup_channel()
3951 int drive; in cmd0643_9_setup_channel() local
3959 for (drive = 0; drive < 2; drive++) { in cmd0643_9_setup_channel()
3960 drvp = &chp->ch_drive[drive]; in cmd0643_9_setup_channel()
3980 chp->channel, drive), DEBUG_PROBE); in cmd0643_9_setup_channel()
3984 udma_reg &= ~CMD_UDMATIM_UDMA33(drive); in cmd0643_9_setup_channel()
3986 udma_reg |= CMD_UDMATIM_UDMA33(drive); in cmd0643_9_setup_channel()
3987 udma_reg |= CMD_UDMATIM_UDMA(drive); in cmd0643_9_setup_channel()
3989 CMD_UDMATIM_TIM_OFF(drive)); in cmd0643_9_setup_channel()
3992 CMD_UDMATIM_TIM_OFF(drive)); in cmd0643_9_setup_channel()
4006 udma_reg &= ~CMD_UDMATIM_UDMA(drive); in cmd0643_9_setup_channel()
4017 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in cmd0643_9_setup_channel()
4020 CMD_DATA_TIM(chp->channel, drive), tim); in cmd0643_9_setup_channel()
4154 int drive; in cmd680_setup_channel() local
4172 for (drive = 0; drive < 2; drive++) { in cmd680_setup_channel()
4173 drvp = &chp->ch_drive[drive]; in cmd680_setup_channel()
4177 mode &= ~(0x03 << (drive * 4)); in cmd680_setup_channel()
4191 mode |= 0x03 << (drive * 4); in cmd680_setup_channel()
4192 off = 0xac + chp->channel * 16 + drive * 2; in cmd680_setup_channel()
4199 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in cmd680_setup_channel()
4201 mode |= 0x02 << (drive * 4); in cmd680_setup_channel()
4202 off = 0xa8 + chp->channel * 16 + drive * 2; in cmd680_setup_channel()
4206 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in cmd680_setup_channel()
4208 mode |= 0x01 << (drive * 4); in cmd680_setup_channel()
4209 off = 0xa4 + chp->channel * 16 + drive * 2; in cmd680_setup_channel()
4372 int drive; in sii3112_setup_channel() local
4383 for (drive = 0; drive < 2; drive++) { in sii3112_setup_channel()
4384 drvp = &chp->ch_drive[drive]; in sii3112_setup_channel()
4391 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in sii3112_setup_channel()
4394 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in sii3112_setup_channel()
4970 int drive; in cy693_setup_channel() local
4983 for (drive = 0; drive < 2; drive++) { in cy693_setup_channel()
4984 drvp = &chp->ch_drive[drive]; in cy693_setup_channel()
4990 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in cy693_setup_channel()
4996 CY_CMD_CTRL_IOW_PULSE_OFF(drive)); in cy693_setup_channel()
4998 CY_CMD_CTRL_IOW_REC_OFF(drive)); in cy693_setup_channel()
5000 CY_CMD_CTRL_IOR_PULSE_OFF(drive)); in cy693_setup_channel()
5002 CY_CMD_CTRL_IOR_REC_OFF(drive)); in cy693_setup_channel()
5258 int drive; in sis96x_setup_channel() local
5270 for (drive = 0; drive < 2; drive++) { in sis96x_setup_channel()
5273 chp->channel, drive); in sis96x_setup_channel()
5274 drvp = &chp->ch_drive[drive]; in sis96x_setup_channel()
5289 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in sis96x_setup_channel()
5302 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in sis96x_setup_channel()
5308 chp->channel, drive, sis_tim, regtim), DEBUG_PROBE); in sis96x_setup_channel()
5323 int drive; in sis_setup_channel() local
5339 for (drive = 0; drive < 2; drive++) { in sis_setup_channel()
5340 drvp = &chp->ch_drive[drive]; in sis_setup_channel()
5361 SIS_TIM66_UDMA_TIME_OFF(drive); in sis_setup_channel()
5366 SIS_TIM100_UDMA_TIME_OFF(drive); in sis_setup_channel()
5371 SIS_TIM100_UDMA_TIME_OFF(drive); in sis_setup_channel()
5391 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in sis_setup_channel()
5397 SIS_TIM66_ACT_OFF(drive); in sis_setup_channel()
5399 SIS_TIM66_REC_OFF(drive); in sis_setup_channel()
5404 SIS_TIM100_ACT_OFF(drive); in sis_setup_channel()
5406 SIS_TIM100_REC_OFF(drive); in sis_setup_channel()
5493 int drive, ndrives = 0; in natsemi_setup_channel() local
5502 for (drive = 0; drive < 2; drive++) { in natsemi_setup_channel()
5503 drvp = &chp->ch_drive[drive]; in natsemi_setup_channel()
5523 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in natsemi_setup_channel()
5529 NATSEMI_RTREG(chp->channel, drive), tim); in natsemi_setup_channel()
5531 NATSEMI_WTREG(chp->channel, drive), tim); in natsemi_setup_channel()
5678 int drive, mode; in ns_scx200_setup_channel() local
5697 for (drive = 0; drive < 2; drive++) { in ns_scx200_setup_channel()
5698 drvp = &chp->ch_drive[drive]; in ns_scx200_setup_channel()
5705 SCx200_TIM_PIO(channel, drive)); in ns_scx200_setup_channel()
5707 SCx200_TIM_DMA(channel, drive)); in ns_scx200_setup_channel()
5709 sc->sc_wdcdev.sc_dev.dv_xname, channel, drive, in ns_scx200_setup_channel()
5716 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in ns_scx200_setup_channel()
5723 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in ns_scx200_setup_channel()
5745 sc->sc_wdcdev.sc_dev.dv_xname, channel, drive, in ns_scx200_setup_channel()
5749 SCx200_TIM_PIO(channel, drive), piotim); in ns_scx200_setup_channel()
5751 SCx200_TIM_DMA(channel, drive), dmatim); in ns_scx200_setup_channel()
5864 int drive; in acer_setup_channel() local
5891 for (drive = 0; drive < 2; drive++) { in acer_setup_channel()
5892 drvp = &chp->ch_drive[drive]; in acer_setup_channel()
5897 "channel %d drive %d 0x%x\n", chp->channel, drive, in acer_setup_channel()
5899 ACER_IDETIM(chp->channel, drive))), DEBUG_PROBE); in acer_setup_channel()
5901 acer_fifo_udma &= ~(ACER_FTH_OPL(chp->channel, drive, 0x3) | in acer_setup_channel()
5902 ACER_UDMA_EN(chp->channel, drive) | in acer_setup_channel()
5903 ACER_UDMA_TIM(chp->channel, drive, 0x7)); in acer_setup_channel()
5909 ACER_FTH_OPL(chp->channel, drive, 0x1); in acer_setup_channel()
5913 acer_fifo_udma |= ACER_FTH_OPL(chp->channel, drive, 0x2); in acer_setup_channel()
5917 acer_fifo_udma |= ACER_UDMA_EN(chp->channel, drive); in acer_setup_channel()
5919 ACER_UDMA_TIM(chp->channel, drive, in acer_setup_channel()
5942 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in acer_setup_channel()
5944 ACER_IDETIM(chp->channel, drive), in acer_setup_channel()
5988 acer_dma_init(void *v, int channel, int drive, void *databuf, in acer_dma_init() argument
5995 return (pciide_dma_init(v, channel, drive, databuf, datalen, flags)); in acer_dma_init()
6146 int drive; in hpt_setup_channel() local
6198 for (drive = 0; drive < 2; drive++) { in hpt_setup_channel()
6199 drvp = &chp->ch_drive[drive]; in hpt_setup_channel()
6204 HPT_IDETIM(chp->channel, drive)); in hpt_setup_channel()
6215 chp->channel, drive), DEBUG_PROBE); in hpt_setup_channel()
6219 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in hpt_setup_channel()
6231 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in hpt_setup_channel()
6237 HPT_IDETIM(chp->channel, drive), after); in hpt_setup_channel()
6486 int drive; in pdc202xx_setup_channel() local
6560 for (drive = 0; drive < 2; drive++) { in pdc202xx_setup_channel()
6561 drvp = &chp->ch_drive[drive]; in pdc202xx_setup_channel()
6573 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in pdc202xx_setup_channel()
6579 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in pdc202xx_setup_channel()
6593 if (drive == 0) in pdc202xx_setup_channel()
6599 chp->channel, drive, mode), DEBUG_PROBE); in pdc202xx_setup_channel()
6601 PDC2xx_TIM(chp->channel, drive), mode); in pdc202xx_setup_channel()
6615 int drive, cable; in pdc20268_setup_channel() local
6629 for (drive = 0; drive < 2; drive++) { in pdc20268_setup_channel()
6630 drvp = &chp->ch_drive[drive]; in pdc20268_setup_channel()
6637 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in pdc20268_setup_channel()
6642 channel, drive), DEBUG_PROBE); in pdc20268_setup_channel()
6646 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in pdc20268_setup_channel()
6737 pdc20262_dma_start(void *v, int channel, int drive) in pdc20262_dma_start() argument
6741 &sc->pciide_channels[channel].dma_maps[drive]; in pdc20262_dma_start()
6757 pciide_dma_start(v, channel, drive); in pdc20262_dma_start()
6761 pdc20262_dma_finish(void *v, int channel, int drive, int force) in pdc20262_dma_finish() argument
6765 &sc->pciide_channels[channel].dma_maps[drive]; in pdc20262_dma_finish()
6777 return (pciide_dma_finish(v, channel, drive, force)); in pdc20262_dma_finish()
7021 int drive, s; in pdc203xx_setup_channel() local
7025 for (drive = 0; drive < 2; drive++) { in pdc203xx_setup_channel()
7026 drvp = &chp->ch_drive[drive]; in pdc203xx_setup_channel()
7119 pdc203xx_dma_start(void *v, int channel, int drive) in pdc203xx_dma_start() argument
7123 struct pciide_dma_maps *dma_maps = &cp->dma_maps[drive]; in pdc203xx_dma_start()
7140 pdc203xx_dma_finish(void *v, int channel, int drive, int force) in pdc203xx_dma_finish() argument
7144 struct pciide_dma_maps *dma_maps = &cp->dma_maps[drive]; in pdc203xx_dma_finish()
7375 int drive, unit; in serverworks_setup_channel() local
7398 for (drive = 0; drive < 2; drive++) { in serverworks_setup_channel()
7399 drvp = &chp->ch_drive[drive]; in serverworks_setup_channel()
7403 unit = drive + 2 * channel; in serverworks_setup_channel()
7417 channel, drive), DEBUG_PROBE); in serverworks_setup_channel()
7423 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in serverworks_setup_channel()
7429 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in serverworks_setup_channel()
7901 int drive; in acard_setup_channel() local
7922 for (drive = 0; drive < 2; drive++) { in acard_setup_channel()
7923 drvp = &chp->ch_drive[drive]; in acard_setup_channel()
7932 idetime |= ATP850_SETTIME(drive, in acard_setup_channel()
7935 udma_mode |= ATP850_UDMA_MODE(channel, drive, in acard_setup_channel()
7938 idetime |= ATP860_SETTIME(channel, drive, in acard_setup_channel()
7941 udma_mode |= ATP860_UDMA_MODE(channel, drive, in acard_setup_channel()
7944 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in acard_setup_channel()
7950 idetime |= ATP850_SETTIME(drive, in acard_setup_channel()
7954 idetime |= ATP860_SETTIME(channel, drive, in acard_setup_channel()
7958 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in acard_setup_channel()
7963 idetime |= ATP850_SETTIME(drive, in acard_setup_channel()
7967 idetime |= ATP860_SETTIME(channel, drive, in acard_setup_channel()
8072 int drive, mode; in nforce_setup_channel() local
8096 for (drive = 0; drive < 2; drive++) { in nforce_setup_channel()
8097 drvp = &chp->ch_drive[drive]; in nforce_setup_channel()
8108 udmatim |= NFORCE_UDMATIM_SET(channel, drive, in nforce_setup_channel()
8110 NFORCE_UDMA_EN(channel, drive) | in nforce_setup_channel()
8111 NFORCE_UDMA_ENM(channel, drive); in nforce_setup_channel()
8128 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in nforce_setup_channel()
8140 piodmatim |= NFORCE_PIODMATIM_SET(channel, drive, in nforce_setup_channel()
8314 int drive, mode; in ite_setup_channel() local
8335 for (drive = 0; drive < 2; drive++) { in ite_setup_channel()
8336 drvp = &chp->ch_drive[drive]; in ite_setup_channel()
8346 modectl &= ~IT_MODE_DMA(channel, drive); in ite_setup_channel()
8351 (cfg & IT_CFG_CABLE(channel, drive)) == 0) { in ite_setup_channel()
8356 channel, drive), DEBUG_PROBE); in ite_setup_channel()
8362 tim |= IT_TIM_UDMA5(drive); in ite_setup_channel()
8364 tim &= ~IT_TIM_UDMA5(drive); in ite_setup_channel()
8371 modectl |= IT_MODE_DMA(channel, drive); in ite_setup_channel()
8382 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in ite_setup_channel()
8465 int drive, mode; in ixp_setup_channel() local
8483 for (drive = 0; drive < 2; drive++) { in ixp_setup_channel()
8484 drvp = &chp->ch_drive[drive]; in ixp_setup_channel()
8492 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in ixp_setup_channel()
8493 IXP_UDMA_ENABLE(udma, chp->channel, drive); in ixp_setup_channel()
8494 IXP_SET_MODE(udma, chp->channel, drive, in ixp_setup_channel()
8501 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in ixp_setup_channel()
8502 IXP_UDMA_DISABLE(udma, chp->channel, drive); in ixp_setup_channel()
8503 IXP_SET_TIMING(mdma_timing, chp->channel, drive, in ixp_setup_channel()
8528 IXP_SET_MODE(pio, chp->channel, drive, drvp->PIO_mode); in ixp_setup_channel()
8529 IXP_SET_TIMING(pio_timing, chp->channel, drive, in ixp_setup_channel()
8621 int drive, mode; in jmicron_setup_channel() local
8637 for (drive = 0; drive < 2; drive++) { in jmicron_setup_channel()
8638 drvp = &chp->ch_drive[drive]; in jmicron_setup_channel()
8669 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in jmicron_setup_channel()
8744 int drive, mode; in phison_setup_channel() local
8757 for (drive = 0; drive < 2; drive++) { in phison_setup_channel()
8758 drvp = &chp->ch_drive[drive]; in phison_setup_channel()
8783 idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive); in phison_setup_channel()
8856 int drive, mode; in sch_setup_channel() local
8865 for (drive = 0; drive < 2; drive++) { in sch_setup_channel()
8866 drvp = &chp->ch_drive[drive]; in sch_setup_channel()
8872 timaddr = (drive == 0) ? SCH_D0TIM : SCH_D1TIM; in sch_setup_channel()
8995 u_int8_t drive; in rdc_setup_channel() local
9013 for (drive = 0; drive < 2; drive++) { in rdc_setup_channel()
9014 udccr &= ~RDCIDE_UDCCR_EN(chp->channel, drive); in rdc_setup_channel()
9015 udccr &= ~RDCIDE_UDCCR_TIM_MASK(chp->channel, drive); in rdc_setup_channel()
9016 iiocr &= ~RDCIDE_IIOCR_CLK_MASK(chp->channel, drive); in rdc_setup_channel()
9019 for (drive = 0; drive < 2; drive++) { in rdc_setup_channel()
9020 drvp = &cp->wdc_channel.ch_drive[drive]; in rdc_setup_channel()
9024 patr |= RDCIDE_PATR_ATA(chp->channel, drive); in rdc_setup_channel()
9025 if (drive == 0) { in rdc_setup_channel()
9040 patr |= RDCIDE_PATR_FTIM(chp->channel, drive); in rdc_setup_channel()
9041 patr |= RDCIDE_PATR_IORDY(chp->channel, drive); in rdc_setup_channel()
9044 patr |= RDCIDE_PATR_DMAEN(chp->channel, drive); in rdc_setup_channel()
9048 if ((iiocr & RDCIDE_IIOCR_CABLE(chp->channel, drive)) == 0 in rdc_setup_channel()
9051 udccr |= RDCIDE_UDCCR_EN(chp->channel, drive); in rdc_setup_channel()
9053 chp->channel, drive); in rdc_setup_channel()
9055 chp->channel, drive); in rdc_setup_channel()