Lines Matching refs:pm
64 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_get_type_index()
65 if (rdev->pm.power_state[i].type == ps_type) { in radeon_pm_get_type_index()
72 return rdev->pm.default_power_state_index; in radeon_pm_get_type_index()
77 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { in radeon_pm_acpi_event_handler()
78 mutex_lock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
80 rdev->pm.dpm.ac_power = true; in radeon_pm_acpi_event_handler()
82 rdev->pm.dpm.ac_power = false; in radeon_pm_acpi_event_handler()
85 radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power); in radeon_pm_acpi_event_handler()
87 mutex_unlock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
88 } else if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_acpi_event_handler()
89 if (rdev->pm.profile == PM_PROFILE_AUTO) { in radeon_pm_acpi_event_handler()
90 mutex_lock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
93 mutex_unlock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
100 switch (rdev->pm.profile) { in radeon_pm_update_profile()
102 rdev->pm.profile_index = PM_PROFILE_DEFAULT_IDX; in radeon_pm_update_profile()
106 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
107 rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; in radeon_pm_update_profile()
109 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; in radeon_pm_update_profile()
111 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
112 rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; in radeon_pm_update_profile()
114 rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; in radeon_pm_update_profile()
118 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
119 rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX; in radeon_pm_update_profile()
121 rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX; in radeon_pm_update_profile()
124 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
125 rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; in radeon_pm_update_profile()
127 rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; in radeon_pm_update_profile()
130 if (rdev->pm.active_crtc_count > 1) in radeon_pm_update_profile()
131 rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; in radeon_pm_update_profile()
133 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; in radeon_pm_update_profile()
137 if (rdev->pm.active_crtc_count == 0) { in radeon_pm_update_profile()
138 rdev->pm.requested_power_state_index = in radeon_pm_update_profile()
139 rdev->pm.profiles[rdev->pm.profile_index].dpms_off_ps_idx; in radeon_pm_update_profile()
140 rdev->pm.requested_clock_mode_index = in radeon_pm_update_profile()
141 rdev->pm.profiles[rdev->pm.profile_index].dpms_off_cm_idx; in radeon_pm_update_profile()
143 rdev->pm.requested_power_state_index = in radeon_pm_update_profile()
144 rdev->pm.profiles[rdev->pm.profile_index].dpms_on_ps_idx; in radeon_pm_update_profile()
145 rdev->pm.requested_clock_mode_index = in radeon_pm_update_profile()
146 rdev->pm.profiles[rdev->pm.profile_index].dpms_on_cm_idx; in radeon_pm_update_profile()
165 if (rdev->pm.active_crtcs) { in radeon_sync_with_vblank()
166 rdev->pm.vblank_sync = false; in radeon_sync_with_vblank()
168 rdev->irq.vblank_queue, rdev->pm.vblank_sync, in radeon_sync_with_vblank()
178 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && in radeon_set_power_state()
179 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) in radeon_set_power_state()
183 sclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
184 clock_info[rdev->pm.requested_clock_mode_index].sclk; in radeon_set_power_state()
185 if (sclk > rdev->pm.default_sclk) in radeon_set_power_state()
186 sclk = rdev->pm.default_sclk; in radeon_set_power_state()
192 if ((rdev->pm.pm_method == PM_METHOD_PROFILE) && in radeon_set_power_state()
194 rdev->pm.active_crtc_count && in radeon_set_power_state()
195 ((rdev->pm.profile_index == PM_PROFILE_MID_MH_IDX) || in radeon_set_power_state()
196 (rdev->pm.profile_index == PM_PROFILE_LOW_MH_IDX))) in radeon_set_power_state()
197 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
198 clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk; in radeon_set_power_state()
200 mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. in radeon_set_power_state()
201 clock_info[rdev->pm.requested_clock_mode_index].mclk; in radeon_set_power_state()
203 if (mclk > rdev->pm.default_mclk) in radeon_set_power_state()
204 mclk = rdev->pm.default_mclk; in radeon_set_power_state()
207 if (sclk < rdev->pm.current_sclk) in radeon_set_power_state()
212 if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_set_power_state()
224 if (sclk != rdev->pm.current_sclk) { in radeon_set_power_state()
228 rdev->pm.current_sclk = sclk; in radeon_set_power_state()
233 if (rdev->asic->pm.set_memory_clock && (mclk != rdev->pm.current_mclk)) { in radeon_set_power_state()
237 rdev->pm.current_mclk = mclk; in radeon_set_power_state()
247 rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index; in radeon_set_power_state()
248 rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index; in radeon_set_power_state()
259 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && in radeon_pm_set_clocks()
260 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) in radeon_pm_set_clocks()
263 down_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
276 up_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
286 if (rdev->pm.active_crtcs & (1 << i)) { in radeon_pm_set_clocks()
289 rdev->pm.req_vblank |= (1 << i); in radeon_pm_set_clocks()
303 if (rdev->pm.req_vblank & (1 << i)) { in radeon_pm_set_clocks()
304 rdev->pm.req_vblank &= ~(1 << i); in radeon_pm_set_clocks()
313 if (rdev->pm.active_crtc_count) in radeon_pm_set_clocks()
316 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_pm_set_clocks()
319 up_write(&rdev->pm.mclk_lock); in radeon_pm_set_clocks()
328 DRM_DEBUG_DRIVER("%d Power State(s)\n", rdev->pm.num_power_states); in radeon_pm_print_states()
329 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_print_states()
330 power_state = &rdev->pm.power_state[i]; in radeon_pm_print_states()
333 if (i == rdev->pm.default_power_state_index) in radeon_pm_print_states()
363 int cp = rdev->pm.profile; in radeon_get_pm_profile()
386 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_profile()
387 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_set_pm_profile()
389 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_set_pm_profile()
391 rdev->pm.profile = PM_PROFILE_AUTO; in radeon_set_pm_profile()
393 rdev->pm.profile = PM_PROFILE_LOW; in radeon_set_pm_profile()
395 rdev->pm.profile = PM_PROFILE_MID; in radeon_set_pm_profile()
397 rdev->pm.profile = PM_PROFILE_HIGH; in radeon_set_pm_profile()
408 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_profile()
419 int pm = rdev->pm.pm_method; in radeon_get_pm_method() local
421 return sysfs_emit(buf, "%s\n", (pm == PM_METHOD_DYNPM) ? "dynpm" : in radeon_get_pm_method()
422 (pm == PM_METHOD_PROFILE) ? "profile" : "dpm"); in radeon_get_pm_method()
443 if (rdev->pm.pm_method == PM_METHOD_DPM) { in radeon_set_pm_method()
449 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_method()
450 rdev->pm.pm_method = PM_METHOD_DYNPM; in radeon_set_pm_method()
451 rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; in radeon_set_pm_method()
452 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_set_pm_method()
453 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_method()
455 mutex_lock(&rdev->pm.mutex); in radeon_set_pm_method()
457 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_set_pm_method()
458 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_set_pm_method()
459 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_set_pm_method()
460 mutex_unlock(&rdev->pm.mutex); in radeon_set_pm_method()
461 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_set_pm_method()
477 enum radeon_pm_state_type pm = rdev->pm.dpm.user_state; in radeon_get_dpm_state() local
480 (pm == POWER_STATE_TYPE_BATTERY) ? "battery" : in radeon_get_dpm_state()
481 (pm == POWER_STATE_TYPE_BALANCED) ? "balanced" : "performance"); in radeon_get_dpm_state()
492 mutex_lock(&rdev->pm.mutex); in radeon_set_dpm_state()
494 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY; in radeon_set_dpm_state()
496 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_set_dpm_state()
498 rdev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE; in radeon_set_dpm_state()
500 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_state()
504 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_state()
523 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_get_dpm_forced_performance_level()
553 mutex_lock(&rdev->pm.mutex); in radeon_set_dpm_forced_performance_level()
565 if (rdev->pm.dpm.thermal_active) { in radeon_set_dpm_forced_performance_level()
574 mutex_unlock(&rdev->pm.mutex); in radeon_set_dpm_forced_performance_level()
695 if (rdev->asic->pm.get_temperature) in radeon_hwmon_show_temp()
712 temp = rdev->pm.dpm.thermal.min_temp; in radeon_hwmon_show_temp_thresh()
714 temp = rdev->pm.dpm.thermal.max_temp; in radeon_hwmon_show_temp_thresh()
794 if (rdev->pm.pm_method != PM_METHOD_DPM && in hwmon_attributes_visible()
811 if (rdev->pm.no_fan && in hwmon_attributes_visible()
856 switch (rdev->pm.int_thermal_type) { in radeon_hwmon_init()
865 if (rdev->asic->pm.get_temperature == NULL) in radeon_hwmon_init()
868 rdev->pm.int_hwmon_dev = hwmon_device_register_with_groups(rdev->dev, in radeon_hwmon_init()
871 if (IS_ERR(rdev->pm.int_hwmon_dev)) { in radeon_hwmon_init()
872 err = PTR_ERR(rdev->pm.int_hwmon_dev); in radeon_hwmon_init()
888 if (rdev->pm.int_hwmon_dev) in radeon_hwmon_fini()
889 hwmon_device_unregister(rdev->pm.int_hwmon_dev); in radeon_hwmon_fini()
897 pm.dpm.thermal.work); in radeon_dpm_thermal_work_handler()
901 if (!rdev->pm.dpm_enabled) in radeon_dpm_thermal_work_handler()
904 if (rdev->asic->pm.get_temperature) { in radeon_dpm_thermal_work_handler()
907 if (temp < rdev->pm.dpm.thermal.min_temp) in radeon_dpm_thermal_work_handler()
909 dpm_state = rdev->pm.dpm.user_state; in radeon_dpm_thermal_work_handler()
911 if (rdev->pm.dpm.thermal.high_to_low) in radeon_dpm_thermal_work_handler()
913 dpm_state = rdev->pm.dpm.user_state; in radeon_dpm_thermal_work_handler()
915 mutex_lock(&rdev->pm.mutex); in radeon_dpm_thermal_work_handler()
917 rdev->pm.dpm.thermal_active = true; in radeon_dpm_thermal_work_handler()
919 rdev->pm.dpm.thermal_active = false; in radeon_dpm_thermal_work_handler()
920 rdev->pm.dpm.state = dpm_state; in radeon_dpm_thermal_work_handler()
921 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_thermal_work_handler()
928 bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ? in radeon_dpm_single_display()
965 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in radeon_dpm_pick_power_state()
966 ps = &rdev->pm.dpm.ps[i]; in radeon_dpm_pick_power_state()
999 if (rdev->pm.dpm.uvd_ps) in radeon_dpm_pick_power_state()
1000 return rdev->pm.dpm.uvd_ps; in radeon_dpm_pick_power_state()
1020 return rdev->pm.dpm.boot_ps; in radeon_dpm_pick_power_state()
1049 if (rdev->pm.dpm.uvd_ps) { in radeon_dpm_pick_power_state()
1050 return rdev->pm.dpm.uvd_ps; in radeon_dpm_pick_power_state()
1082 if (!rdev->pm.dpm_enabled) in radeon_dpm_change_power_state_locked()
1085 if (rdev->pm.dpm.user_state != rdev->pm.dpm.state) { in radeon_dpm_change_power_state_locked()
1087 if ((!rdev->pm.dpm.thermal_active) && in radeon_dpm_change_power_state_locked()
1088 (!rdev->pm.dpm.uvd_active)) in radeon_dpm_change_power_state_locked()
1089 rdev->pm.dpm.state = rdev->pm.dpm.user_state; in radeon_dpm_change_power_state_locked()
1091 dpm_state = rdev->pm.dpm.state; in radeon_dpm_change_power_state_locked()
1095 rdev->pm.dpm.requested_ps = ps; in radeon_dpm_change_power_state_locked()
1100 if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) { in radeon_dpm_change_power_state_locked()
1102 if (ps->vce_active != rdev->pm.dpm.vce_active) in radeon_dpm_change_power_state_locked()
1105 if (rdev->pm.dpm.single_display != single_display) in radeon_dpm_change_power_state_locked()
1111 if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()
1116 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1117 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1125 if (rdev->pm.dpm.new_active_crtcs == in radeon_dpm_change_power_state_locked()
1126 rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()
1129 if ((rdev->pm.dpm.current_active_crtc_count > 1) && in radeon_dpm_change_power_state_locked()
1130 (rdev->pm.dpm.new_active_crtc_count > 1)) { in radeon_dpm_change_power_state_locked()
1135 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1136 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1146 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.current_ps); in radeon_dpm_change_power_state_locked()
1148 radeon_dpm_print_power_state(rdev, rdev->pm.dpm.requested_ps); in radeon_dpm_change_power_state_locked()
1151 down_write(&rdev->pm.mclk_lock); in radeon_dpm_change_power_state_locked()
1155 ps->vce_active = rdev->pm.dpm.vce_active; in radeon_dpm_change_power_state_locked()
1177 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps; in radeon_dpm_change_power_state_locked()
1181 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()
1182 rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count; in radeon_dpm_change_power_state_locked()
1183 rdev->pm.dpm.single_display = single_display; in radeon_dpm_change_power_state_locked()
1186 if (rdev->pm.dpm.thermal_active) { in radeon_dpm_change_power_state_locked()
1187 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_dpm_change_power_state_locked()
1191 rdev->pm.dpm.forced_level = level; in radeon_dpm_change_power_state_locked()
1194 radeon_dpm_force_performance_level(rdev, rdev->pm.dpm.forced_level); in radeon_dpm_change_power_state_locked()
1200 up_write(&rdev->pm.mclk_lock); in radeon_dpm_change_power_state_locked()
1208 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1211 enable |= rdev->pm.dpm.sd > 0; in radeon_dpm_enable_uvd()
1212 enable |= rdev->pm.dpm.hd > 0; in radeon_dpm_enable_uvd()
1215 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1218 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1219 rdev->pm.dpm.uvd_active = true; in radeon_dpm_enable_uvd()
1222 if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0)) in radeon_dpm_enable_uvd()
1224 else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0)) in radeon_dpm_enable_uvd()
1226 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 1)) in radeon_dpm_enable_uvd()
1228 else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2)) in radeon_dpm_enable_uvd()
1233 rdev->pm.dpm.state = dpm_state; in radeon_dpm_enable_uvd()
1234 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1236 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1237 rdev->pm.dpm.uvd_active = false; in radeon_dpm_enable_uvd()
1238 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_uvd()
1248 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1249 rdev->pm.dpm.vce_active = true; in radeon_dpm_enable_vce()
1251 rdev->pm.dpm.vce_level = RADEON_VCE_LEVEL_AC_ALL; in radeon_dpm_enable_vce()
1252 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1254 mutex_lock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1255 rdev->pm.dpm.vce_active = false; in radeon_dpm_enable_vce()
1256 mutex_unlock(&rdev->pm.mutex); in radeon_dpm_enable_vce()
1264 mutex_lock(&rdev->pm.mutex); in radeon_pm_suspend_old()
1265 if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_suspend_old()
1266 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) in radeon_pm_suspend_old()
1267 rdev->pm.dynpm_state = DYNPM_STATE_SUSPENDED; in radeon_pm_suspend_old()
1269 mutex_unlock(&rdev->pm.mutex); in radeon_pm_suspend_old()
1271 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_pm_suspend_old()
1276 mutex_lock(&rdev->pm.mutex); in radeon_pm_suspend_dpm()
1280 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_suspend_dpm()
1281 rdev->pm.dpm_enabled = false; in radeon_pm_suspend_dpm()
1282 mutex_unlock(&rdev->pm.mutex); in radeon_pm_suspend_dpm()
1287 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_suspend()
1299 if (rdev->pm.default_vddc) in radeon_pm_resume_old()
1300 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_resume_old()
1302 if (rdev->pm.default_vddci) in radeon_pm_resume_old()
1303 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_resume_old()
1305 if (rdev->pm.default_sclk) in radeon_pm_resume_old()
1306 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_resume_old()
1307 if (rdev->pm.default_mclk) in radeon_pm_resume_old()
1308 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_resume_old()
1311 mutex_lock(&rdev->pm.mutex); in radeon_pm_resume_old()
1312 rdev->pm.current_power_state_index = rdev->pm.default_power_state_index; in radeon_pm_resume_old()
1313 rdev->pm.current_clock_mode_index = 0; in radeon_pm_resume_old()
1314 rdev->pm.current_sclk = rdev->pm.default_sclk; in radeon_pm_resume_old()
1315 rdev->pm.current_mclk = rdev->pm.default_mclk; in radeon_pm_resume_old()
1316 if (rdev->pm.power_state) { in radeon_pm_resume_old()
1317 …rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vol… in radeon_pm_resume_old()
1318 …rdev->pm.current_vddci = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].vo… in radeon_pm_resume_old()
1320 if (rdev->pm.pm_method == PM_METHOD_DYNPM in radeon_pm_resume_old()
1321 && rdev->pm.dynpm_state == DYNPM_STATE_SUSPENDED) { in radeon_pm_resume_old()
1322 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_resume_old()
1323 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_resume_old()
1326 mutex_unlock(&rdev->pm.mutex); in radeon_pm_resume_old()
1335 mutex_lock(&rdev->pm.mutex); in radeon_pm_resume_dpm()
1336 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_resume_dpm()
1339 mutex_unlock(&rdev->pm.mutex); in radeon_pm_resume_dpm()
1342 rdev->pm.dpm_enabled = true; in radeon_pm_resume_dpm()
1350 if (rdev->pm.default_vddc) in radeon_pm_resume_dpm()
1351 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_resume_dpm()
1353 if (rdev->pm.default_vddci) in radeon_pm_resume_dpm()
1354 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_resume_dpm()
1356 if (rdev->pm.default_sclk) in radeon_pm_resume_dpm()
1357 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_resume_dpm()
1358 if (rdev->pm.default_mclk) in radeon_pm_resume_dpm()
1359 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_resume_dpm()
1365 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_resume()
1375 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_pm_init_old()
1376 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_pm_init_old()
1377 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_pm_init_old()
1378 rdev->pm.dynpm_can_upclock = true; in radeon_pm_init_old()
1379 rdev->pm.dynpm_can_downclock = true; in radeon_pm_init_old()
1380 rdev->pm.default_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()
1381 rdev->pm.default_mclk = rdev->clock.default_mclk; in radeon_pm_init_old()
1382 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()
1383 rdev->pm.current_mclk = rdev->clock.default_mclk; in radeon_pm_init_old()
1384 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; in radeon_pm_init_old()
1397 if (rdev->pm.default_vddc) in radeon_pm_init_old()
1398 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_init_old()
1400 if (rdev->pm.default_vddci) in radeon_pm_init_old()
1401 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_init_old()
1403 if (rdev->pm.default_sclk) in radeon_pm_init_old()
1404 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_init_old()
1405 if (rdev->pm.default_mclk) in radeon_pm_init_old()
1406 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_init_old()
1415 INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler); in radeon_pm_init_old()
1417 if (rdev->pm.num_power_states > 1) { in radeon_pm_init_old()
1429 for (i = 0; i < rdev->pm.dpm.num_ps; i++) { in radeon_dpm_print_power_states()
1431 radeon_dpm_print_power_state(rdev, &rdev->pm.dpm.ps[i]); in radeon_dpm_print_power_states()
1440 rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED; in radeon_pm_init_dpm()
1441 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_pm_init_dpm()
1442 rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO; in radeon_pm_init_dpm()
1443 rdev->pm.default_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()
1444 rdev->pm.default_mclk = rdev->clock.default_mclk; in radeon_pm_init_dpm()
1445 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()
1446 rdev->pm.current_mclk = rdev->clock.default_mclk; in radeon_pm_init_dpm()
1447 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; in radeon_pm_init_dpm()
1459 INIT_WORK(&rdev->pm.dpm.thermal.work, radeon_dpm_thermal_work_handler); in radeon_pm_init_dpm()
1460 mutex_lock(&rdev->pm.mutex); in radeon_pm_init_dpm()
1462 rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps; in radeon_pm_init_dpm()
1467 mutex_unlock(&rdev->pm.mutex); in radeon_pm_init_dpm()
1470 rdev->pm.dpm_enabled = true; in radeon_pm_init_dpm()
1479 rdev->pm.dpm_enabled = false; in radeon_pm_init_dpm()
1483 if (rdev->pm.default_vddc) in radeon_pm_init_dpm()
1484 radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, in radeon_pm_init_dpm()
1486 if (rdev->pm.default_vddci) in radeon_pm_init_dpm()
1487 radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, in radeon_pm_init_dpm()
1489 if (rdev->pm.default_sclk) in radeon_pm_init_dpm()
1490 radeon_set_engine_clock(rdev, rdev->pm.default_sclk); in radeon_pm_init_dpm()
1491 if (rdev->pm.default_mclk) in radeon_pm_init_dpm()
1492 radeon_set_memory_clock(rdev, rdev->pm.default_mclk); in radeon_pm_init_dpm()
1543 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1547 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1549 rdev->pm.pm_method = PM_METHOD_DPM; in radeon_pm_init()
1551 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1581 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1585 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1587 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1589 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1591 rdev->pm.pm_method = PM_METHOD_DPM; in radeon_pm_init()
1595 rdev->pm.pm_method = PM_METHOD_PROFILE; in radeon_pm_init()
1599 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_init()
1609 if (rdev->pm.pm_method == PM_METHOD_DPM) { in radeon_pm_late_init()
1610 if (rdev->pm.dpm_enabled) { in radeon_pm_late_init()
1612 if (!rdev->pm.sysfs_initialized) { in radeon_pm_late_init()
1626 rdev->pm.sysfs_initialized = true; in radeon_pm_late_init()
1630 mutex_lock(&rdev->pm.mutex); in radeon_pm_late_init()
1632 mutex_unlock(&rdev->pm.mutex); in radeon_pm_late_init()
1634 rdev->pm.dpm_enabled = false; in radeon_pm_late_init()
1645 if ((rdev->pm.num_power_states > 1) && in radeon_pm_late_init()
1646 (!rdev->pm.sysfs_initialized)) { in radeon_pm_late_init()
1655 rdev->pm.sysfs_initialized = true; in radeon_pm_late_init()
1664 if (rdev->pm.num_power_states > 1) { in radeon_pm_fini_old()
1665 mutex_lock(&rdev->pm.mutex); in radeon_pm_fini_old()
1666 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_fini_old()
1667 rdev->pm.profile = PM_PROFILE_DEFAULT; in radeon_pm_fini_old()
1670 } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_fini_old()
1672 rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; in radeon_pm_fini_old()
1673 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_pm_fini_old()
1676 mutex_unlock(&rdev->pm.mutex); in radeon_pm_fini_old()
1678 cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); in radeon_pm_fini_old()
1685 kfree(rdev->pm.power_state); in radeon_pm_fini_old()
1690 if (rdev->pm.num_power_states > 1) { in radeon_pm_fini_dpm()
1691 mutex_lock(&rdev->pm.mutex); in radeon_pm_fini_dpm()
1693 mutex_unlock(&rdev->pm.mutex); in radeon_pm_fini_dpm()
1704 kfree(rdev->pm.power_state); in radeon_pm_fini_dpm()
1709 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_fini()
1721 if (rdev->pm.num_power_states < 2) in radeon_pm_compute_clocks_old()
1724 mutex_lock(&rdev->pm.mutex); in radeon_pm_compute_clocks_old()
1726 rdev->pm.active_crtcs = 0; in radeon_pm_compute_clocks_old()
1727 rdev->pm.active_crtc_count = 0; in radeon_pm_compute_clocks_old()
1733 rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_old()
1734 rdev->pm.active_crtc_count++; in radeon_pm_compute_clocks_old()
1739 if (rdev->pm.pm_method == PM_METHOD_PROFILE) { in radeon_pm_compute_clocks_old()
1742 } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { in radeon_pm_compute_clocks_old()
1743 if (rdev->pm.dynpm_state != DYNPM_STATE_DISABLED) { in radeon_pm_compute_clocks_old()
1744 if (rdev->pm.active_crtc_count > 1) { in radeon_pm_compute_clocks_old()
1745 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { in radeon_pm_compute_clocks_old()
1746 cancel_delayed_work(&rdev->pm.dynpm_idle_work); in radeon_pm_compute_clocks_old()
1748 rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; in radeon_pm_compute_clocks_old()
1749 rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; in radeon_pm_compute_clocks_old()
1755 } else if (rdev->pm.active_crtc_count == 1) { in radeon_pm_compute_clocks_old()
1758 if (rdev->pm.dynpm_state == DYNPM_STATE_MINIMUM) { in radeon_pm_compute_clocks_old()
1759 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_compute_clocks_old()
1760 rdev->pm.dynpm_planned_action = DYNPM_ACTION_UPCLOCK; in radeon_pm_compute_clocks_old()
1764 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_compute_clocks_old()
1766 } else if (rdev->pm.dynpm_state == DYNPM_STATE_PAUSED) { in radeon_pm_compute_clocks_old()
1767 rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; in radeon_pm_compute_clocks_old()
1768 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_pm_compute_clocks_old()
1773 if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) { in radeon_pm_compute_clocks_old()
1774 cancel_delayed_work(&rdev->pm.dynpm_idle_work); in radeon_pm_compute_clocks_old()
1776 rdev->pm.dynpm_state = DYNPM_STATE_MINIMUM; in radeon_pm_compute_clocks_old()
1777 rdev->pm.dynpm_planned_action = DYNPM_ACTION_MINIMUM; in radeon_pm_compute_clocks_old()
1785 mutex_unlock(&rdev->pm.mutex); in radeon_pm_compute_clocks_old()
1795 if (!rdev->pm.dpm_enabled) in radeon_pm_compute_clocks_dpm()
1798 mutex_lock(&rdev->pm.mutex); in radeon_pm_compute_clocks_dpm()
1801 rdev->pm.dpm.new_active_crtcs = 0; in radeon_pm_compute_clocks_dpm()
1802 rdev->pm.dpm.new_active_crtc_count = 0; in radeon_pm_compute_clocks_dpm()
1803 rdev->pm.dpm.high_pixelclock_count = 0; in radeon_pm_compute_clocks_dpm()
1809 rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_dpm()
1810 rdev->pm.dpm.new_active_crtc_count++; in radeon_pm_compute_clocks_dpm()
1816 rdev->pm.dpm.high_pixelclock_count++; in radeon_pm_compute_clocks_dpm()
1823 rdev->pm.dpm.ac_power = true; in radeon_pm_compute_clocks_dpm()
1825 rdev->pm.dpm.ac_power = false; in radeon_pm_compute_clocks_dpm()
1829 mutex_unlock(&rdev->pm.mutex); in radeon_pm_compute_clocks_dpm()
1835 if (rdev->pm.pm_method == PM_METHOD_DPM) in radeon_pm_compute_clocks()
1850 if (rdev->pm.active_crtcs & (1 << crtc)) { in radeon_pm_in_vbl()
1881 pm.dynpm_idle_work.work); in radeon_dynpm_idle_work_handler()
1883 mutex_lock(&rdev->pm.mutex); in radeon_dynpm_idle_work_handler()
1884 if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { in radeon_dynpm_idle_work_handler()
1899 if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_DOWNCLOCK) { in radeon_dynpm_idle_work_handler()
1900 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_dynpm_idle_work_handler()
1901 } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1902 rdev->pm.dynpm_can_upclock) { in radeon_dynpm_idle_work_handler()
1903 rdev->pm.dynpm_planned_action = in radeon_dynpm_idle_work_handler()
1905 rdev->pm.dynpm_action_timeout = jiffies + in radeon_dynpm_idle_work_handler()
1909 if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_UPCLOCK) { in radeon_dynpm_idle_work_handler()
1910 rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; in radeon_dynpm_idle_work_handler()
1911 } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1912 rdev->pm.dynpm_can_downclock) { in radeon_dynpm_idle_work_handler()
1913 rdev->pm.dynpm_planned_action = in radeon_dynpm_idle_work_handler()
1915 rdev->pm.dynpm_action_timeout = jiffies + in radeon_dynpm_idle_work_handler()
1923 if (rdev->pm.dynpm_planned_action != DYNPM_ACTION_NONE && in radeon_dynpm_idle_work_handler()
1924 time_after(jiffies, rdev->pm.dynpm_action_timeout)) { in radeon_dynpm_idle_work_handler()
1929 schedule_delayed_work(&rdev->pm.dynpm_idle_work, in radeon_dynpm_idle_work_handler()
1932 mutex_unlock(&rdev->pm.mutex); in radeon_dynpm_idle_work_handler()
1948 } else if (rdev->pm.dpm_enabled) { in radeon_debugfs_pm_info_show()
1949 mutex_lock(&rdev->pm.mutex); in radeon_debugfs_pm_info_show()
1954 mutex_unlock(&rdev->pm.mutex); in radeon_debugfs_pm_info_show()
1956 seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk); in radeon_debugfs_pm_info_show()
1959 seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); in radeon_debugfs_pm_info_show()
1962 seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk); in radeon_debugfs_pm_info_show()
1963 if (rdev->asic->pm.get_memory_clock) in radeon_debugfs_pm_info_show()
1965 if (rdev->pm.current_vddc) in radeon_debugfs_pm_info_show()
1966 seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc); in radeon_debugfs_pm_info_show()
1967 if (rdev->asic->pm.get_pcie_lanes) in radeon_debugfs_pm_info_show()