178 void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset,  in r600_hdmi_update_acr()  argument
187 	WREG32_P(acr_ctl + offset,  in r600_hdmi_update_acr()
193 	WREG32_P(HDMI0_ACR_32_0 + offset,  in r600_hdmi_update_acr()
196 	WREG32_P(HDMI0_ACR_32_1 + offset,  in r600_hdmi_update_acr()
200 	WREG32_P(HDMI0_ACR_44_0 + offset,  in r600_hdmi_update_acr()
203 	WREG32_P(HDMI0_ACR_44_1 + offset,  in r600_hdmi_update_acr()
207 	WREG32_P(HDMI0_ACR_48_0 + offset,  in r600_hdmi_update_acr()
210 	WREG32_P(HDMI0_ACR_48_1 + offset,  in r600_hdmi_update_acr()
218 void r600_set_avi_packet(struct radeon_device *rdev, u32 offset,  in r600_set_avi_packet()  argument
223 	WREG32(HDMI0_AVI_INFO0 + offset,  in r600_set_avi_packet()
225 	WREG32(HDMI0_AVI_INFO1 + offset,  in r600_set_avi_packet()
227 	WREG32(HDMI0_AVI_INFO2 + offset,  in r600_set_avi_packet()
229 	WREG32(HDMI0_AVI_INFO3 + offset,  in r600_set_avi_packet()
232 	WREG32_OR(HDMI0_INFOFRAME_CONTROL1 + offset,  in r600_set_avi_packet()
235 	WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,  in r600_set_avi_packet()
251 	uint32_t offset = dig->afmt->offset;  in r600_hdmi_update_audio_infoframe()  local
254 	WREG32(HDMI0_AUDIO_INFO0 + offset,  in r600_hdmi_update_audio_infoframe()
256 	WREG32(HDMI0_AUDIO_INFO1 + offset,  in r600_hdmi_update_audio_infoframe()
269 	uint32_t offset = dig->afmt->offset;  in r600_hdmi_is_audio_buffer_filled()  local
271 	return (RREG32(HDMI0_STATUS + offset) & 0x10) != 0;  in r600_hdmi_is_audio_buffer_filled()
302 	uint32_t offset = dig->afmt->offset;  in r600_hdmi_audio_workaround()  local
311 	WREG32_P(HDMI0_AUDIO_PACKET_CONTROL + offset,  in r600_hdmi_audio_workaround()
341 void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset)  in r600_set_vbi_packet()  argument
346 	WREG32_OR(HDMI0_VBI_PACKET_CONTROL + offset,  in r600_set_vbi_packet()
352 void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset)  in r600_set_audio_packet()  argument
357 	WREG32_P(HDMI0_AUDIO_PACKET_CONTROL + offset,  in r600_set_audio_packet()
367 	WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,  in r600_set_audio_packet()
371 	WREG32_P(HDMI0_INFOFRAME_CONTROL1 + offset,  in r600_set_audio_packet()
375 	WREG32_AND(HDMI0_GENERIC_PACKET_CONTROL + offset,  in r600_set_audio_packet()
384 	WREG32_P(HDMI0_60958_0 + offset,  in r600_set_audio_packet()
389 	WREG32_P(HDMI0_60958_1 + offset,  in r600_set_audio_packet()
394 void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute)  in r600_set_mute()  argument
400 		WREG32_OR(HDMI0_GC + offset, HDMI0_GC_AVMUTE);  in r600_set_mute()
402 		WREG32_AND(HDMI0_GC + offset, ~HDMI0_GC_AVMUTE);  in r600_set_mute()
421 	uint32_t offset;  in r600_hdmi_update_audio_settings()  local
427 	offset = dig->afmt->offset;  in r600_hdmi_update_audio_settings()
449 	value = RREG32(HDMI0_AUDIO_PACKET_CONTROL + offset);  in r600_hdmi_update_audio_settings()
451 		WREG32(HDMI0_AUDIO_PACKET_CONTROL + offset,  in r600_hdmi_update_audio_settings()
454 	WREG32_OR(HDMI0_CONTROL + offset,  in r600_hdmi_update_audio_settings()
457 	WREG32_AND(HDMI0_INFOFRAME_CONTROL0 + offset,  in r600_hdmi_update_audio_settings()
462 	WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset,  in r600_hdmi_update_audio_settings()
519 		WREG32(HDMI0_CONTROL + dig->afmt->offset, hdmi);  in r600_hdmi_enable()
534 		  enable ? "En" : "Dis", dig->afmt->offset, radeon_encoder->encoder_id);  in r600_hdmi_enable()