Lines Matching refs:qtd
539 struct dwc2_qtd *qtd, in dwc2_fill_host_isoc_dma_desc() argument
547 frame_desc = &qtd->urb->iso_descs[qtd->isoc_frame_index_last]; in dwc2_fill_host_isoc_dma_desc()
554 dma_desc->buf = (u32)(DMAADDR(qtd->urb->usbdma, frame_desc->offset)); in dwc2_fill_host_isoc_dma_desc()
562 qtd->isoc_frame_index_last++; in dwc2_fill_host_isoc_dma_desc()
566 if (qtd->isoc_frame_index_last == qtd->urb->packet_count) in dwc2_fill_host_isoc_dma_desc()
579 struct dwc2_qtd *qtd; in dwc2_init_isoc_dma_desc() local
618 list_for_each_entry(qtd, &qh->qtd_list, qtd_list_entry) { in dwc2_init_isoc_dma_desc()
619 if (qtd->in_process && in dwc2_init_isoc_dma_desc()
620 qtd->isoc_frame_index_last == in dwc2_init_isoc_dma_desc()
621 qtd->urb->packet_count) in dwc2_init_isoc_dma_desc()
624 qtd->isoc_td_first = idx; in dwc2_init_isoc_dma_desc()
625 while (qh->ntd < ntd_max && qtd->isoc_frame_index_last < in dwc2_init_isoc_dma_desc()
626 qtd->urb->packet_count) { in dwc2_init_isoc_dma_desc()
627 dwc2_fill_host_isoc_dma_desc(hsotg, qtd, qh, in dwc2_init_isoc_dma_desc()
632 qtd->isoc_td_last = idx; in dwc2_init_isoc_dma_desc()
633 qtd->in_process = 1; in dwc2_init_isoc_dma_desc()
686 struct dwc2_qtd *qtd, struct dwc2_qh *qh, in dwc2_fill_host_dma_desc() argument
713 qtd->control_phase == DWC2_CONTROL_SETUP) in dwc2_fill_host_dma_desc()
738 struct dwc2_qtd *qtd; in dwc2_init_non_isoc_dma_desc() local
752 list_for_each_entry(qtd, &qh->qtd_list, qtd_list_entry) { in dwc2_init_non_isoc_dma_desc()
753 dev_vdbg(hsotg->dev, "qtd=%p\n", qtd); in dwc2_init_non_isoc_dma_desc()
757 chan->xfer_dma = DMAADDR(qtd->urb->usbdma, in dwc2_init_non_isoc_dma_desc()
758 qtd->urb->actual_length); in dwc2_init_non_isoc_dma_desc()
759 chan->xfer_len = qtd->urb->length - in dwc2_init_non_isoc_dma_desc()
760 qtd->urb->actual_length; in dwc2_init_non_isoc_dma_desc()
765 qtd->n_desc = 0; in dwc2_init_non_isoc_dma_desc()
779 dwc2_fill_host_dma_desc(hsotg, chan, qtd, qh, n_desc); in dwc2_init_non_isoc_dma_desc()
785 qtd->n_desc++; in dwc2_init_non_isoc_dma_desc()
791 qtd->in_process = 1; in dwc2_init_non_isoc_dma_desc()
885 struct dwc2_qtd *qtd, in dwc2_cmpl_host_isoc_dma_desc() argument
893 if (!qtd->urb) in dwc2_cmpl_host_isoc_dma_desc()
903 frame_desc = &qtd->urb->iso_descs[qtd->isoc_frame_index_last]; in dwc2_cmpl_host_isoc_dma_desc()
904 dma_desc->buf = (u32)(DMAADDR(qtd->urb->usbdma, frame_desc->offset)); in dwc2_cmpl_host_isoc_dma_desc()
915 qtd->urb->error_count++; in dwc2_cmpl_host_isoc_dma_desc()
924 if (++qtd->isoc_frame_index == qtd->urb->packet_count) { in dwc2_cmpl_host_isoc_dma_desc()
929 dwc2_host_complete(hsotg, qtd, 0); in dwc2_cmpl_host_isoc_dma_desc()
930 dwc2_hcd_qtd_unlink_and_free(hsotg, qtd, qh); in dwc2_cmpl_host_isoc_dma_desc()
957 struct dwc2_qtd *qtd, *qtd_tmp; in dwc2_complete_isoc_xfer_ddma() local
966 list_for_each_entry(qtd, &qh->qtd_list, qtd_list_entry) in dwc2_complete_isoc_xfer_ddma()
967 qtd->in_process = 0; in dwc2_complete_isoc_xfer_ddma()
985 list_for_each_entry_safe(qtd, qtd_tmp, &qh->qtd_list, in dwc2_complete_isoc_xfer_ddma()
987 if (qtd->urb) { in dwc2_complete_isoc_xfer_ddma()
988 for (idx = 0; idx < qtd->urb->packet_count; in dwc2_complete_isoc_xfer_ddma()
990 frame_desc = &qtd->urb->iso_descs[idx]; in dwc2_complete_isoc_xfer_ddma()
994 dwc2_host_complete(hsotg, qtd, err); in dwc2_complete_isoc_xfer_ddma()
997 dwc2_hcd_qtd_unlink_and_free(hsotg, qtd, qh); in dwc2_complete_isoc_xfer_ddma()
1003 list_for_each_entry_safe(qtd, qtd_tmp, &qh->qtd_list, qtd_list_entry) { in dwc2_complete_isoc_xfer_ddma()
1004 if (!qtd->in_process) in dwc2_complete_isoc_xfer_ddma()
1012 if (idx != qtd->isoc_td_first) { in dwc2_complete_isoc_xfer_ddma()
1015 idx, qtd->isoc_td_first); in dwc2_complete_isoc_xfer_ddma()
1016 idx = qtd->isoc_td_first; in dwc2_complete_isoc_xfer_ddma()
1023 rc = dwc2_cmpl_host_isoc_dma_desc(hsotg, chan, qtd, qh, in dwc2_complete_isoc_xfer_ddma()
1058 struct dwc2_qtd *qtd, in dwc2_update_non_isoc_urb_state_ddma() argument
1063 struct dwc2_hcd_urb *urb = qtd->urb; in dwc2_update_non_isoc_urb_state_ddma()
1109 if (qtd->control_phase == DWC2_CONTROL_DATA) { in dwc2_update_non_isoc_urb_state_ddma()
1119 } else if (qtd->control_phase == DWC2_CONTROL_STATUS) { in dwc2_update_non_isoc_urb_state_ddma()
1140 int chnum, struct dwc2_qtd *qtd, in dwc2_process_non_isoc_desc() argument
1146 struct dwc2_hcd_urb *urb = qtd->urb; in dwc2_process_non_isoc_desc()
1165 qtd, urb, desc_num, dma_desc, n_bytes); in dwc2_process_non_isoc_desc()
1166 failed = dwc2_update_non_isoc_urb_state_ddma(hsotg, chan, qtd, dma_desc, in dwc2_process_non_isoc_desc()
1173 dwc2_host_complete(hsotg, qtd, urb->status); in dwc2_process_non_isoc_desc()
1174 dwc2_hcd_qtd_unlink_and_free(hsotg, qtd, qh); in dwc2_process_non_isoc_desc()
1181 switch (qtd->control_phase) { in dwc2_process_non_isoc_desc()
1184 qtd->control_phase = DWC2_CONTROL_DATA; in dwc2_process_non_isoc_desc()
1186 qtd->control_phase = DWC2_CONTROL_STATUS; in dwc2_process_non_isoc_desc()
1192 qtd->control_phase = DWC2_CONTROL_STATUS; in dwc2_process_non_isoc_desc()
1195 } else if (desc_num + 1 == qtd->n_desc) { in dwc2_process_non_isoc_desc()
1201 qtd); in dwc2_process_non_isoc_desc()
1219 struct dwc2_qtd *qtd = NULL; in dwc2_complete_non_isoc_xfer_ddma() local
1224 list_for_each_entry(qtd, &qh->qtd_list, qtd_list_entry) in dwc2_complete_non_isoc_xfer_ddma()
1225 qtd->in_process = 0; in dwc2_complete_non_isoc_xfer_ddma()
1232 qtd = list_entry(qtd_item, struct dwc2_qtd, qtd_list_entry); in dwc2_complete_non_isoc_xfer_ddma()
1235 for (i = 0; i < qtd->n_desc; i++) { in dwc2_complete_non_isoc_xfer_ddma()
1236 if (dwc2_process_non_isoc_desc(hsotg, chan, chnum, qtd, in dwc2_complete_non_isoc_xfer_ddma()
1239 qtd = NULL; in dwc2_complete_non_isoc_xfer_ddma()
1253 else if (qtd) in dwc2_complete_non_isoc_xfer_ddma()
1254 dwc2_hcd_save_data_toggle(hsotg, chan, chnum, qtd); in dwc2_complete_non_isoc_xfer_ddma()
1300 struct dwc2_qtd *qtd, *qtd_tmp; in dwc2_hcd_complete_xfer_ddma() local
1306 list_for_each_entry_safe(qtd, qtd_tmp, in dwc2_hcd_complete_xfer_ddma()
1309 dwc2_host_complete(hsotg, qtd, in dwc2_hcd_complete_xfer_ddma()
1312 qtd, qh); in dwc2_hcd_complete_xfer_ddma()