Lines Matching refs:RAL_WRITE
798 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff); in rt2661_newstate()
1205 RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16); in rt2661_mcu_wakeup()
1207 RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7); in rt2661_mcu_wakeup()
1208 RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18); in rt2661_mcu_wakeup()
1209 RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20); in rt2661_mcu_wakeup()
1219 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); in rt2661_mcu_cmd_intr()
1232 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); in rt2661_intr()
1233 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); in rt2661_intr()
1244 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); in rt2661_intr()
1245 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); in rt2661_intr()
1265 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1); in rt2661_softintr()
1266 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2); in rt2661_softintr()
1300 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); in rt2661_softintr()
1301 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); in rt2661_softintr()
1571 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT); in rt2661_tx_mgt()
1801 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1); in rt2661_tx_data()
2005 RAL_WRITE(sc, RT2661_PHY_CSR3, tmp); in rt2661_bbp_write()
2027 RAL_WRITE(sc, RT2661_PHY_CSR3, val); in rt2661_bbp_read()
2057 RAL_WRITE(sc, RT2661_PHY_CSR4, tmp); in rt2661_rf_write()
2071 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, in rt2661_tx_cmd()
2074 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd); in rt2661_tx_cmd()
2092 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); in rt2661_select_antenna()
2098 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); in rt2661_select_antenna()
2118 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); in rt2661_enable_mrr()
2132 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp); in rt2661_set_txpreamble()
2159 RAL_WRITE(sc, RT2661_TXRX_CSR5, mask); in rt2661_set_basicrates()
2209 RAL_WRITE(sc, RT2661_PHY_CSR0, tmp); in rt2661_select_band()
2296 RAL_WRITE(sc, RT2661_MAC_CSR4, tmp); in rt2661_set_bssid()
2299 RAL_WRITE(sc, RT2661_MAC_CSR5, tmp); in rt2661_set_bssid()
2308 RAL_WRITE(sc, RT2661_MAC_CSR2, tmp); in rt2661_set_macaddr()
2311 RAL_WRITE(sc, RT2661_MAC_CSR3, tmp); in rt2661_set_macaddr()
2326 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); in rt2661_update_promisc()
2348 RAL_WRITE(sc, RT2661_AC_TXOP_CSR0,
2351 RAL_WRITE(sc, RT2661_AC_TXOP_CSR1,
2356 RAL_WRITE(sc, RT2661_CWMIN_CSR,
2363 RAL_WRITE(sc, RT2661_CWMAX_CSR,
2370 RAL_WRITE(sc, RT2661_AIFSN_CSR,
2408 RAL_WRITE(sc, RT2661_MAC_CSR9, tmp); in rt2661_set_slottime()
2619 RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr); in rt2661_init()
2620 RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr); in rt2661_init()
2621 RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr); in rt2661_init()
2622 RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr); in rt2661_init()
2625 RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr); in rt2661_init()
2628 RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr); in rt2661_init()
2631 RAL_WRITE(sc, RT2661_TX_RING_CSR0, in rt2661_init()
2637 RAL_WRITE(sc, RT2661_TX_RING_CSR1, in rt2661_init()
2643 RAL_WRITE(sc, RT2661_RX_RING_CSR, in rt2661_init()
2649 RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa); in rt2661_init()
2652 RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f); in rt2661_init()
2655 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2); in rt2661_init()
2659 RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val); in rt2661_init()
2665 RAL_WRITE(sc, RT2661_MAC_CSR1, 3); in rt2661_init()
2666 RAL_WRITE(sc, RT2661_MAC_CSR1, 0); in rt2661_init()
2704 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); in rt2661_init()
2710 RAL_WRITE(sc, RT2661_MAC_CSR1, 4); in rt2661_init()
2713 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); in rt2661_init()
2716 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10); in rt2661_init()
2717 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0); in rt2661_init()
2720 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1); in rt2661_init()
2749 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16); in rt2661_stop()
2753 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); in rt2661_stop()
2756 RAL_WRITE(sc, RT2661_MAC_CSR1, 3); in rt2661_stop()
2757 RAL_WRITE(sc, RT2661_MAC_CSR1, 0); in rt2661_stop()
2760 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f); in rt2661_stop()
2761 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff); in rt2661_stop()
2764 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff); in rt2661_stop()
2765 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff); in rt2661_stop()
2790 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); in rt2661_load_microcode()
2793 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0); in rt2661_load_microcode()
2794 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff); in rt2661_load_microcode()
2795 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0); in rt2661_load_microcode()
2798 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL); in rt2661_load_microcode()
2800 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET); in rt2661_load_microcode()
2803 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0); in rt2661_load_microcode()
2892 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX); in rt2661_radar_start()
2914 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp); in rt2661_radar_start()
3003 RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8); in rt2661_enable_tsf_sync()
3017 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp); in rt2661_enable_tsf_sync()