173 njsc32_write_2(struct njsc32_softc *sc, int no, int val)  in njsc32_write_2()  function
298           njsc32_write_2(sc, NJSC32_REG_IRQ, NJSC32_IRQ_MASK_ALL);  in njsc32_init()
301           njsc32_write_2(sc, NJSC32_REG_TRANSFER, 0);  in njsc32_init()
380           njsc32_write_2(sc, NJSC32_REG_TIMER, NJSC32_TIMER_STOP);  in njsc32_init()
381           njsc32_write_2(sc, NJSC32_REG_TIMER, NJSC32_TIMER_STOP);  in njsc32_init()
386           njsc32_write_2(sc, NJSC32_REG_SEL_TIMEOUT,  in njsc32_init()
564           njsc32_write_2(sc, NJSC32_REG_TRANSFER, NJSC32_XFR_DUALEDGE_ENABLE);  in njsc32_attach()
574           njsc32_write_2(sc, NJSC32_REG_TRANSFER, 0);       /* restore */  in njsc32_attach()
911           njsc32_write_2(sc, NJSC32_REG_COMMAND_CONTROL, NJSC32_CMD_CLEAR_CDB_FIFO_PTR);  in njsc32_cmd_load()
988           njsc32_write_2(sc, NJSC32_REG_COMMAND_CONTROL,  in njsc32_cmd_load()
1002           njsc32_write_2(sc, NJSC32_REG_TRANSFER,  in njsc32_cmd_load()
1005           njsc32_write_2(sc, NJSC32_REG_TRANSFER, cmd->c_xferctl);  in njsc32_cmd_load()
1008           njsc32_write_2(sc, NJSC32_REG_COMMAND_CONTROL,  in njsc32_cmd_load()
1058           njsc32_write_2(sc, NJSC32_REG_TIMER, NJSC32_ARBITRATION_RETRY_TIME);  in njsc32_start()
1059 out:      njsc32_write_2(sc, NJSC32_REG_TRANSFER, 0);  in njsc32_start()
1346           njsc32_write_2(sc, NJSC32_REG_IRQ, 0);  in njsc32_wait_reset_release()
1359           njsc32_write_2(sc, NJSC32_REG_IRQ, NJSC32_IRQ_MASK_ALL);  in njsc32_reset_bus()
1698           njsc32_write_2(sc, NJSC32_REG_TRANSFER,  in njsc32_cmd_reload()
1701           njsc32_write_2(sc, NJSC32_REG_TRANSFER, cmd->c_xferctl);  in njsc32_cmd_reload()
1704           njsc32_write_2(sc, NJSC32_REG_COMMAND_CONTROL, cctl);  in njsc32_cmd_reload()
2112                     njsc32_write_2(sc, NJSC32_REG_COMMAND_CONTROL, cctl);  in njsc32_msgin()
2152                     njsc32_write_2(sc, NJSC32_REG_COMMAND_CONTROL, cctl);  in njsc32_msgout()
2163                     njsc32_write_2(sc, NJSC32_REG_COMMAND_CONTROL, 0);  in njsc32_msgout()
2180           njsc32_write_2(sc, NJSC32_REG_COMMAND_CONTROL, cctl);  in njsc32_msgout()
2352           njsc32_write_2(sc, NJSC32_REG_IRQ, NJSC32_IRQ_MASK_ALL);  in njsc32_intr()
2356           njsc32_write_2(sc, NJSC32_REG_TIMER, NJSC32_TIMER_STOP);  in njsc32_intr()
2508                     njsc32_write_2(sc, NJSC32_REG_EXECUTE_PHASE, 0);  in njsc32_intr()
2616                                                   njsc32_write_2(sc,  in njsc32_intr()
2702           njsc32_write_2(sc, NJSC32_REG_IRQ, 0);  in njsc32_intr()