Lines Matching refs:AR_WRITE
543 AR_WRITE(sc, AR_GPIO_IN_OUT, reg); in ar9003_gpio_write()
555 AR_WRITE(sc, AR_GPIO_OE_OUT, reg); in ar9003_gpio_config_input()
571 AR_WRITE(sc, AR_GPIO_OUTPUT_MUX(mux), reg); in ar9003_gpio_config_output()
576 AR_WRITE(sc, AR_GPIO_OE_OUT, reg); in ar9003_gpio_config_output()
589 AR_WRITE(sc, AR_GPIO_INPUT_MUX2, reg); in ar9003_rfsilent_init()
827 AR_WRITE(sc, AR_Q_STATUS_RING_START, in ar9003_reset_txsring()
829 AR_WRITE(sc, AR_Q_STATUS_RING_END, in ar9003_reset_txsring()
846 AR_WRITE(sc, AR_RXBP_THRESH, reg); in ar9003_rx_enable()
849 AR_WRITE(sc, AR_DATABUF_SIZE, ATHN_RXBUFSZ - sizeof(*ds)); in ar9003_rx_enable()
862 AR_WRITE(sc, AR_LP_RXDP, bf->bf_daddr); in ar9003_rx_enable()
864 AR_WRITE(sc, AR_HP_RXDP, bf->bf_daddr); in ar9003_rx_enable()
870 AR_WRITE(sc, AR_CR, 0); in ar9003_rx_enable()
1077 AR_WRITE(sc, AR_LP_RXDP, bf->bf_daddr); in ar9003_rx_process()
1079 AR_WRITE(sc, AR_HP_RXDP, bf->bf_daddr); in ar9003_rx_process()
1084 AR_WRITE(sc, AR_CR, 0); in ar9003_rx_process()
1179 AR_WRITE(sc, AR_QTXDP(qid), txq->wait->bf_daddr); in ar9003_tx_process()
1314 AR_WRITE(sc, AR_QTXDP(ATHN_QID_BEACON), bf->bf_daddr); in ar9003_swba_intr()
1337 AR_WRITE(sc, AR_Q_TXE, 1 << ATHN_QID_BEACON); in ar9003_swba_intr()
1440 AR_WRITE(sc, AR_RC, AR_RC_HOSTIF); in ar9003_intr()
1441 AR_WRITE(sc, AR_RC, 0); in ar9003_intr()
1450 AR_WRITE(sc, AR_INTR_SYNC_CAUSE, sync); in ar9003_intr()
1848 AR_WRITE(sc, AR_QTXDP(qid), bf->bf_daddr); in ar9003_tx()
1867 AR_WRITE(sc, AR_PHY_MODE, reg); in ar9003_set_rf_mode()
1890 AR_WRITE(sc, AR_PHY_RFBUS_REQ, AR_PHY_RFBUS_REQ_EN); in ar9003_rf_bus_request()
1907 AR_WRITE(sc, AR_PHY_RFBUS_REQ, 0); in ar9003_rf_bus_release()
1929 AR_WRITE(sc, AR_PHY_GEN_CTRL, phy); in ar9003_set_phy()
1931 AR_WRITE(sc, AR_2040_MODE, in ar9003_set_phy()
1935 AR_WRITE(sc, AR_GTXTO, SM(AR_GTXTO_TIMEOUT_LIMIT, 25)); in ar9003_set_phy()
1937 AR_WRITE(sc, AR_CST, SM(AR_CST_TIMEOUT_LIMIT, 15)); in ar9003_set_phy()
1955 AR_WRITE(sc, AR_PHY_TIMING3, reg); in ar9003_set_delta_slope()
1965 AR_WRITE(sc, AR_PHY_SGI_DELTA, reg); in ar9003_set_delta_slope()
1984 AR_WRITE(sc, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); in ar9003_init_baseband()
1992 AR_WRITE(sc, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS); in ar9003_disable_phy()
2003 AR_WRITE(sc, AR_PHY_RX_CHAINMASK, sc->sc_rxchainmask); in ar9003_init_chains()
2004 AR_WRITE(sc, AR_PHY_CAL_CHAINMASK, sc->sc_rxchainmask); in ar9003_init_chains()
2011 AR_WRITE(sc, AR_SELFGEN_MASK, 0x3); in ar9003_init_chains()
2014 AR_WRITE(sc, AR_SELFGEN_MASK, sc->sc_txchainmask); in ar9003_init_chains()
2022 AR_WRITE(sc, AR_PHY_RX_CHAINMASK, sc->sc_rxchainmask); in ar9003_set_rxchains()
2023 AR_WRITE(sc, AR_PHY_CAL_CHAINMASK, sc->sc_rxchainmask); in ar9003_set_rxchains()
2060 AR_WRITE(sc, AR_PHY_CCA(i), reg); in ar9003_write_noisefloor()
2064 AR_WRITE(sc, AR_PHY_EXT_CCA(i), reg); in ar9003_write_noisefloor()
2186 AR_WRITE(sc, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS); in ar9003_init_calib()
2189 AR_WRITE(sc, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); in ar9003_init_calib()
2219 AR_WRITE(sc, AR_PHY_TIMING4, reg); in ar9003_do_calib()
2220 AR_WRITE(sc, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ); in ar9003_do_calib()
2298 AR_WRITE(sc, AR_PHY_RX_IQCAL_CORR_B(i), reg); in ar9003_calib_iq()
2441 AR_WRITE(sc, AR_PHY_TX_IQCAL_CONTROL_1, reg); in ar9003_calib_tx_iq()
2484 AR_WRITE(sc, AR_PHY_TX_IQCAL_CORR_COEFF_01_B(i), reg); in ar9003_calib_tx_iq()
2491 AR_WRITE(sc, AR_PHY_RX_IQCAL_CORR_B(i), reg); in ar9003_calib_tx_iq()
2535 AR_WRITE(sc, AR_PHY_PAPRD_AM2AM, reg); in ar9003_paprd_calib()
2540 AR_WRITE(sc, AR_PHY_PAPRD_AM2PM, reg); in ar9003_paprd_calib()
2544 AR_WRITE(sc, AR_PHY_PAPRD_HT40, reg); in ar9003_paprd_calib()
2556 AR_WRITE(sc, AR_PHY_PAPRD_CTRL1_B(i), reg); in ar9003_paprd_calib()
2560 AR_WRITE(sc, AR_PHY_PAPRD_CTRL0_B(i), reg); in ar9003_paprd_calib()
2581 AR_WRITE(sc, AR_PHY_PAPRD_TRAINER_CNTL1, reg); in ar9003_paprd_calib()
2583 AR_WRITE(sc, AR_PHY_PAPRD_TRAINER_CNTL2, 147); in ar9003_paprd_calib()
2596 AR_WRITE(sc, AR_PHY_PAPRD_TRAINER_CNTL3, reg); in ar9003_paprd_calib()
2602 AR_WRITE(sc, AR_PHY_PAPRD_TRAINER_CNTL4, reg); in ar9003_paprd_calib()
2607 AR_WRITE(sc, AR_PHY_PAPRD_PRE_POST_SCALE_B0(i), reg); in ar9003_paprd_calib()
2692 AR_WRITE(sc, AR_PHY_TX_FORCED_GAIN, reg); in ar9003_force_txgain()
2697 AR_WRITE(sc, AR_PHY_TPC_1, reg); in ar9003_force_txgain()
3027 AR_WRITE(sc, AR_PHY_PAPRD_MEM_TAB_B(chain, i), in ar9003_enable_predistorter()
3034 AR_WRITE(sc, AR_PHY_PA_GAIN123_B(chain), reg); in ar9003_enable_predistorter()
3039 AR_WRITE(sc, AR_PHY_PAPRD_CTRL1_B(chain), reg); in ar9003_enable_predistorter()
3104 AR_WRITE(sc, AR_PHY_TX_FORCED_GAIN, 0); in ar9003_write_txpower()
3106 AR_WRITE(sc, AR_PHY_PWRTX_RATE1, in ar9003_write_txpower()
3111 AR_WRITE(sc, AR_PHY_PWRTX_RATE2, in ar9003_write_txpower()
3116 AR_WRITE(sc, AR_PHY_PWRTX_RATE3, in ar9003_write_txpower()
3121 AR_WRITE(sc, AR_PHY_PWRTX_RATE4, in ar9003_write_txpower()
3130 AR_WRITE(sc, AR_PHY_PWRTX_RATE5, in ar9003_write_txpower()
3136 AR_WRITE(sc, AR_PHY_PWRTX_RATE6, in ar9003_write_txpower()
3141 AR_WRITE(sc, AR_PHY_PWRTX_RATE7, in ar9003_write_txpower()
3146 AR_WRITE(sc, AR_PHY_PWRTX_RATE8, in ar9003_write_txpower()
3151 AR_WRITE(sc, AR_PHY_PWRTX_RATE10, in ar9003_write_txpower()
3156 AR_WRITE(sc, AR_PHY_PWRTX_RATE11, in ar9003_write_txpower()
3161 AR_WRITE(sc, AR_PHY_PWRTX_RATE12, in ar9003_write_txpower()
3183 AR_WRITE(sc, X(prog->regs[i]), pvals[i]); in ar9003_reset_rx_gain()
3201 AR_WRITE(sc, X(prog->regs[i]), pvals[i]); in ar9003_reset_tx_gain()
3223 AR_WRITE(sc, X(ini->cmregs[i]), ini->cmvals[i]); in ar9003_hw_init()
3251 AR_WRITE(sc, X(ini->regs[i]), pvals[i]); in ar9003_hw_init()
3274 AR_WRITE(sc, X(ini->fastregs[i]), pvals[i]); in ar9003_hw_init()
3292 AR_WRITE(sc, AR_PCU_MISC_MODE2, reg); in ar9003_hw_init()
3377 AR_WRITE(sc, AR_PHY_DESIRED_SZ, reg); in ar9003_set_noise_immunity_level()
3382 AR_WRITE(sc, AR_PHY_AGC, reg); in ar9003_set_noise_immunity_level()
3386 AR_WRITE(sc, AR_PHY_FIND_SIG, reg); in ar9003_set_noise_immunity_level()
3399 AR_WRITE(sc, AR_PHY_SFCORR_LOW, reg); in ar9003_enable_ofdm_weak_signal()
3405 AR_WRITE(sc, AR_PHY_SFCORR, reg); in ar9003_enable_ofdm_weak_signal()
3412 AR_WRITE(sc, AR_PHY_SFCORR_EXT, reg); in ar9003_enable_ofdm_weak_signal()
3428 AR_WRITE(sc, AR_PHY_SFCORR_LOW, reg); in ar9003_disable_ofdm_weak_signal()
3434 AR_WRITE(sc, AR_PHY_SFCORR, reg); in ar9003_disable_ofdm_weak_signal()
3441 AR_WRITE(sc, AR_PHY_SFCORR_EXT, reg); in ar9003_disable_ofdm_weak_signal()
3455 AR_WRITE(sc, AR_PHY_CCK_DETECT, reg); in ar9003_set_cck_weak_signal()
3466 AR_WRITE(sc, AR_PHY_FIND_SIG, reg); in ar9003_set_firstep_level()
3477 AR_WRITE(sc, AR_PHY_TIMING5, reg); in ar9003_set_spur_immunity_level()