Lines Matching refs:HIDBIT

40 #define HIDBIT(x) (0x8000000000000000LL >> x)  macro
41 #define HID0_64_ONE_PPC       HIDBIT(0)   /* one instruction per dispatch group */
42 #define HID0_64_DO_SNGL       HIDBIT(1)   /* single group completion mode */
43 #define HID0_64_ISYNCSC       HIDBIT(2)   /* Disable isync scoreboard optimization */
44 #define HID0_64_SER_GP        HIDBIT(3)   /* Serialize group dispatch */
45 #define HID0_64_DEEPNAP       HIDBIT(7)   /* Enable deep nap mode (970) */
46 #define HID0_64_DOZE          HIDBIT(8)   /* Enable doze mode */
47 #define HID0_64_NAP HIDBIT(9)   /* Enable nap mode */
48 #define HID0_64_DPM HIDBIT(11)  /* Enable Dynamic power management */
49 #define HID0_64_TG  HIDBIT(13)  /* Perfmon threshold granularity control */
50 #define HID0_64_HNG_DIS       HIDBIT(14)  /* Disable processor hang-detection */
51 #define HID0_64_NHR HIDBIT(15)  /* No Hard Reset */
52 #define HID0_64_INORDER       HIDBIT(16)  /* Serialized group issue mode */
53 #define HID0_64_TB_CTRL       HIDBIT(18)  /* TB keeps running if CPU stopped */
54 #define HID0_64_EX_TBEN       HIDBIT(19)  /* timebase runs at external clock */
55 #define HID0_64_CIABREN       HIDBIT(22)  /* enable CIABR register */
56 #define HID0_64_HDICEEN       HIDBIT(23)  /* hypervisor decrementer enable */
57 #define HID0_64_EN_ATTN       HIDBIT(31)  /* support processor attention inst. */
58 #define HID0_64_EN_MCHK       HIDBIT(32)  /* ext. mchk interrupts */