Lines Matching refs:sd
61 #define SD sd
84 static void ColdReset (SIM_DESC sd);
92 … sim_io_eprintf(sd,"Delay slot already activated (branch in delay slot?)\n");\
141 static SIM_RC sim_firmware_command (SIM_DESC sd, char* arg);
149 static void open_trace (SIM_DESC sd);
151 #define open_trace(sd) argument
173 mips_option_handler (SIM_DESC sd, sim_cpu *cpu, int opt, char *arg, in mips_option_handler() argument
187 cpu = STATE_CPU (sd, cpu_nr); in mips_option_handler()
219 sim_io_printf(sd,"Failed to allocate buffer for tracefile name \"%s\"\n",optarg); in mips_option_handler()
225 sim_io_printf(sd,"Placing trace information into file \"%s\"\n",tracefile); in mips_option_handler()
232 return sim_firmware_command (sd, arg); in mips_option_handler()
299 interrupt_event (SIM_DESC sd, void *data) in interrupt_event() argument
301 sim_cpu *cpu = STATE_CPU (sd, 0); /* FIXME */ in interrupt_event()
309 sim_events_schedule (sd, 1, interrupt_event, data); in interrupt_event()
316 static void device_init(SIM_DESC sd) { in device_init() argument
319 register_devices(sd); in device_init()
347 SIM_DESC sd = sim_state_alloc_extra (kind, cb, in sim_open() local
351 SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); in sim_open()
354 if (sim_cpu_alloc_all_extra (sd, 0, sizeof (struct mips_sim_cpu)) in sim_open()
358 cpu = STATE_CPU (sd, 0); /* FIXME */ in sim_open()
361 STATE_WATCHPOINTS (sd)->interrupt_handler = interrupt_event; in sim_open()
369 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) in sim_open()
371 sim_add_option_table (sd, NULL, mips_options); in sim_open()
375 if (sim_parse_args (sd, argv) != SIM_RC_OK) in sim_open()
379 sim_module_uninstall (sd); in sim_open()
394 sim_do_command(sd," memory region 0x7fff8000,0x8000") ; /* MTZ- 32 k stack */ in sim_open()
398 for (entry = STATE_MEMOPT (sd); entry != NULL; entry = entry->next) in sim_open()
430 sim_do_commandf (sd, "memory delete %d:0x%" PRIxTW "@%d", in sim_open()
439 sim_do_commandf (sd, "memory alias 0x%x@1,0x%x%%0x%lx,0x%0x", in sim_open()
442 sim_do_commandf (sd, "memory alias 0x%x,0x%" PRIxTW ",0x%" PRIxTA, in sim_open()
446 device_init(sd); in sim_open()
451 STATE_ENVIRONMENT (sd) = OPERATING_ENVIRONMENT; in sim_open()
454 sim_do_commandf (sd, "memory alias 0x%x@1,0x%x,0x%0x", in sim_open()
460 sim_do_commandf (sd, "memory alias 0x%x@1,0x%x,0x%0x", in sim_open()
469 sim_do_commandf (sd, "memory alias 0x%x@1,0x%x,0x%0x", in sim_open()
494 STATE_ENVIRONMENT (sd) = OPERATING_ENVIRONMENT; in sim_open()
499 sim_do_commandf (sd, "memory alias 0x%x@1,0x%x,0x%0x", in sim_open()
505 sim_do_commandf (sd, "memory alias 0x%x@1,0x%x,0x%0x", in sim_open()
514 sim_do_commandf (sd, "memory alias 0x%x@1,0x%x,0x%0x", in sim_open()
522 sim_do_commandf (sd, "memory alias 0x%x@1,0x%x", 0xB1000000, 0x400); /* ISA I/O */ in sim_open()
523 sim_do_commandf (sd, "memory alias 0x%x@1,0x%x", 0xB2100000, 0x004); /* ISA ctl */ in sim_open()
524 sim_do_commandf (sd, "memory alias 0x%x@1,0x%x", 0xB2500000, 0x004); /* LED/switch */ in sim_open()
525 sim_do_commandf (sd, "memory alias 0x%x@1,0x%x", 0xB2700000, 0x004); /* RTC */ in sim_open()
526 sim_do_commandf (sd, "memory alias 0x%x@1,0x%x", 0xB3C00000, 0x004); /* RTC */ in sim_open()
527 sim_do_commandf (sd, "memory alias 0x%x@1,0x%x", 0xFFFF8000, 0x900); /* DRAMC */ in sim_open()
528 sim_do_commandf (sd, "memory alias 0x%x@1,0x%x", 0xFFFF9000, 0x200); /* EBIF */ in sim_open()
529 sim_do_commandf (sd, "memory alias 0x%x@1,0x%x", 0xFFFFE000, 0x01c); /* EBIF */ in sim_open()
530 sim_do_commandf (sd, "memory alias 0x%x@1,0x%x", 0xFFFFF500, 0x300); /* PIO */ in sim_open()
534 sim_hw_parse (sd, "/tx3904irc@0xffffc000/reg 0xffffc000 0x20"); in sim_open()
535 sim_hw_parse (sd, "/tx3904cpu"); in sim_open()
536 sim_hw_parse (sd, "/tx3904tmr@0xfffff000/reg 0xfffff000 0x100"); in sim_open()
537 sim_hw_parse (sd, "/tx3904tmr@0xfffff100/reg 0xfffff100 0x100"); in sim_open()
538 sim_hw_parse (sd, "/tx3904tmr@0xfffff200/reg 0xfffff200 0x100"); in sim_open()
539 sim_hw_parse (sd, "/tx3904sio@0xfffff300/reg 0xfffff300 0x100"); in sim_open()
549 sim_hw_parse (sd, "/tx3904sio@0xfffff300/backend stdio"); in sim_open()
551 sim_hw_parse (sd, "/tx3904sio@0xfffff300/backend tcp"); in sim_open()
553 sim_hw_parse (sd, "/tx3904sio@0xfffff400/reg 0xfffff400 0x100"); in sim_open()
554 sim_hw_parse (sd, "/tx3904sio@0xfffff400/backend stdio"); in sim_open()
557 sim_hw_parse (sd, "/tx3904irc > ip level /tx3904cpu"); in sim_open()
558 sim_hw_parse (sd, "/tx3904tmr@0xfffff000 > int tmr0 /tx3904irc"); in sim_open()
559 sim_hw_parse (sd, "/tx3904tmr@0xfffff100 > int tmr1 /tx3904irc"); in sim_open()
560 sim_hw_parse (sd, "/tx3904tmr@0xfffff200 > int tmr2 /tx3904irc"); in sim_open()
561 sim_hw_parse (sd, "/tx3904sio@0xfffff300 > int sio0 /tx3904irc"); in sim_open()
562 sim_hw_parse (sd, "/tx3904sio@0xfffff400 > int sio1 /tx3904irc"); in sim_open()
568 sim_hw_parse (sd, "/pal@0xffff0000"); in sim_open()
569 sim_hw_parse (sd, "/pal@0xffff0000/reg 0xffff0000 64"); in sim_open()
572 sim_hw_parse (sd, "/pal@0x31000000 > countdown tmr0 /tx3904irc"); in sim_open()
573 sim_hw_parse (sd, "/pal@0x31000000 > timer tmr1 /tx3904irc"); in sim_open()
574 sim_hw_parse (sd, "/pal@0x31000000 > int int0 /tx3904irc"); in sim_open()
580 sim_hw_parse (sd, "/glue@0xffff0000/reg 0xffff0000 0x50"); in sim_open()
581 sim_hw_parse (sd, "/glue@0xffff0000 > int0 int0 /tx3904irc"); in sim_open()
582 sim_hw_parse (sd, "/glue@0xffff0000 > int1 int1 /tx3904irc"); in sim_open()
583 sim_hw_parse (sd, "/glue@0xffff0000 > int2 int2 /tx3904irc"); in sim_open()
584 sim_hw_parse (sd, "/glue@0xffff0000 > int3 int3 /tx3904irc"); in sim_open()
585 sim_hw_parse (sd, "/glue@0xffff0000 > int4 int4 /tx3904irc"); in sim_open()
586 sim_hw_parse (sd, "/glue@0xffff0000 > int5 int5 /tx3904irc"); in sim_open()
587 sim_hw_parse (sd, "/glue@0xffff0000 > int6 int6 /tx3904irc"); in sim_open()
588 sim_hw_parse (sd, "/glue@0xffff0000 > int7 int7 /tx3904irc"); in sim_open()
589 sim_hw_parse (sd, "/glue@0xffff0000 > int8 dmac0 /tx3904irc"); in sim_open()
590 sim_hw_parse (sd, "/glue@0xffff0000 > int9 dmac1 /tx3904irc"); in sim_open()
591 sim_hw_parse (sd, "/glue@0xffff0000 > int10 dmac2 /tx3904irc"); in sim_open()
592 sim_hw_parse (sd, "/glue@0xffff0000 > int11 dmac3 /tx3904irc"); in sim_open()
593 sim_hw_parse (sd, "/glue@0xffff0000 > int12 sio0 /tx3904irc"); in sim_open()
594 sim_hw_parse (sd, "/glue@0xffff0000 > int13 sio1 /tx3904irc"); in sim_open()
595 sim_hw_parse (sd, "/glue@0xffff0000 > int14 tmr0 /tx3904irc"); in sim_open()
596 sim_hw_parse (sd, "/glue@0xffff0000 > int15 tmr1 /tx3904irc"); in sim_open()
597 sim_hw_parse (sd, "/glue@0xffff0000 > int16 tmr2 /tx3904irc"); in sim_open()
598 sim_hw_parse (sd, "/glue@0xffff0000 > int17 nmi /tx3904cpu"); in sim_open()
601 device_init(sd); in sim_open()
615 for (ol = STATE_OPTIONS (sd), prev = NULL; in sim_open()
624 STATE_OPTIONS (sd) = ol->next; in sim_open()
628 sim_do_commandf (sd, "memory-info"); in sim_open()
632 if (sim_analyze_program (sd, STATE_PROG_FILE (sd), abfd) != SIM_RC_OK) in sim_open()
634 sim_module_uninstall (sd); in sim_open()
640 if (sim_config (sd) != SIM_RC_OK) in sim_open()
642 sim_module_uninstall (sd); in sim_open()
646 if (sim_post_argv_init (sd) != SIM_RC_OK) in sim_open()
650 sim_module_uninstall (sd); in sim_open()
686 open_trace(sd); in sim_open()
705 sim_do_commandf (sd, "memory alias %#" PRIxTA ",%#" PRIxTA ",%#" PRIxTA, in sim_open()
709 sim_do_commandf (sd, "memory region %#" PRIxTA ",%#" PRIxTA, in sim_open()
723 sim_write (sd, vaddr, &insn, sizeof (insn)); in sim_open()
771 sim_write (sd, vaddr, &value, sizeof (value)); in sim_open()
777 sim_write (sd, vaddr, &value, sizeof (value)); in sim_open()
792 sim_write (sd, 0x80000000, halt, sizeof (halt)); in sim_open()
793 sim_write (sd, 0x80000180, halt, sizeof (halt)); in sim_open()
794 sim_write (sd, 0x80000200, halt, sizeof (halt)); in sim_open()
796 sim_write (sd, 0xBFC00200, halt, sizeof (halt)); in sim_open()
797 sim_write (sd, 0xBFC00380, halt, sizeof (halt)); in sim_open()
798 sim_write (sd, 0xBFC00400, halt, sizeof (halt)); in sim_open()
805 cpu = STATE_CPU (sd, i); in sim_open()
813 return sd; in sim_open()
818 open_trace (SIM_DESC sd) in open_trace() argument
823 …sim_io_eprintf(sd,"Failed to create file \"%s\", writing trace information to stderr.\n",tracefile… in open_trace()
837 mips_sim_close (SIM_DESC sd, int quitting) in mips_sim_close() argument
1006 sim_create_inferior (SIM_DESC sd, struct bfd *abfd, in sim_create_inferior() argument
1017 ColdReset(sd); in sim_create_inferior()
1023 for (cpu_nr = 0; cpu_nr < sim_engine_nr_cpus (sd); cpu_nr++) in sim_create_inferior()
1025 sim_cpu *cpu = STATE_CPU (sd, cpu_nr); in sim_create_inferior()
1047 sim_io_printf(sd,"sim_create_inferior() : passed arguments ignored\n"); in sim_create_inferior()
1062 fetch_str (SIM_DESC sd, in fetch_str() argument
1068 while (sim_read (sd, addr + nr, &null, 1) == 1 && null != 0) in fetch_str()
1071 sim_read (sd, addr, buf, nr); in fetch_str()
1083 sim_firmware_command (SIM_DESC sd, char *arg) in sim_firmware_command() argument
1103 sim_io_printf (sd, "Invalid address given to the" in sim_firmware_command()
1140 sim_io_printf (sd, in sim_firmware_command()
1151 sim_io_printf (sd, "\ in sim_firmware_command()
1182 sim_monitor (SIM_DESC sd, in sim_monitor() argument
1204 char *path = fetch_str (sd, A0); in sim_monitor()
1205 V0 = sim_io_open (sd, path, (int)A1); in sim_monitor()
1215 V0 = sim_io_read (sd, fd, buf, nr); in sim_monitor()
1216 sim_write (sd, A1, buf, nr); in sim_monitor()
1226 sim_read (sd, A1, buf, nr); in sim_monitor()
1227 V0 = sim_io_write (sd, fd, buf, nr); in sim_monitor()
1229 sim_io_flush_stdout (sd); in sim_monitor()
1231 sim_io_flush_stderr (sd); in sim_monitor()
1238 V0 = sim_io_close (sd, (int)A0); in sim_monitor()
1253 sim_io_flush_stdout (sd); in sim_monitor()
1254 if (sim_io_read_stdin (sd, &tmp, sizeof(char)) != sizeof(char)) in sim_monitor()
1256 sim_io_error(sd,"Invalid return from character read"); in sim_monitor()
1268 sim_io_write_stdout (sd, &tmp, sizeof(char)); in sim_monitor()
1274 char *path = fetch_str (sd, A0); in sim_monitor()
1275 V0 = sim_io_unlink (sd, path); in sim_monitor()
1282 V0 = sim_io_lseek (sd, A0, A1, A2); in sim_monitor()
1291 host_callback *cb = STATE_CALLBACK (sd); in sim_monitor()
1294 bfd *prog_bfd = STATE_PROG_BFD (sd); in sim_monitor()
1304 s.p1 = sd; in sim_monitor()
1313 sim_engine_halt (sd, cpu, NULL, mips_pc_get (cpu), in sim_monitor()
1324 sim_io_eprintf (sd, "sim_monitor(17): _exit(int reason) to be coded\n"); in sim_monitor()
1345 for (entry = STATE_MEMOPT (sd); in sim_monitor()
1373 sim_write (sd, A0 + 0, &value, 4); in sim_monitor()
1374 sim_write (sd, A0 + 4, &zero, 4); in sim_monitor()
1375 sim_write (sd, A0 + 8, &zero, 4); in sim_monitor()
1396 while (sim_read (sd, s++, &c, 1) && c != '\0') in sim_monitor()
1405 while (sim_read (sd, s++, &c, 1) && c != '\0') in sim_monitor()
1426 while (sim_read (sd, s++, &c, 1) == 1 && isdigit (c)) in sim_monitor()
1442 sim_io_printf (sd, "%%"); in sim_monitor()
1449 while (sim_read (sd, p++, &ch, 1) == 1 && ch != '\0') in sim_monitor()
1450 sim_io_printf(sd, "%c", ch); in sim_monitor()
1453 sim_io_printf(sd,"(null)"); in sim_monitor()
1456 sim_io_printf (sd, "%c", (int)*ap++); in sim_monitor()
1461 sim_read (sd, s++, &c, 1); in sim_monitor()
1465 sim_read (sd, s++, &c, 1); in sim_monitor()
1472 sim_io_printf(sd,"<binary not supported>"); in sim_monitor()
1478 sim_io_printf (sd, "%" fmt64, lv); \ in sim_monitor()
1480 sim_io_printf (sd, "%" fmt32, (int)lv); \ in sim_monitor()
1501 sim_io_printf (sd, "%*.*" #fmtc, width, trunc, dbl); \ in sim_monitor()
1517 sim_io_printf(sd, "%c", c); in sim_monitor()
1532 store_word (SIM_DESC sd, in store_word() argument
1563 load_word (SIM_DESC sd, in load_word() argument
1568 if ((vaddr & 3) != 0 && !MIPSR6_P (STATE_PROG_BFD (sd))) in load_word()
1596 mips16_entry (SIM_DESC sd, in mips16_entry() argument
1724 dotrace (SIM_DESC sd, in dotrace() argument
1766 ColdReset (SIM_DESC sd) in ColdReset() argument
1769 for (cpu_nr = 0; cpu_nr < sim_engine_nr_cpus (sd); cpu_nr++) in ColdReset()
1771 sim_cpu *cpu = STATE_CPU (sd, cpu_nr); in ColdReset()
1822 signal_exception (SIM_DESC sd, in signal_exception() argument
1830 sim_io_printf(sd,"DBG: SignalException(%d) PC = 0x%s\n",exception,pr_addr(cia)); in signal_exception()
1838 SIM_CPU_EXCEPTION_TRIGGER(sd, cpu, cia); in signal_exception()
1886 … sim_io_error (sd, "sim_monitor: unhandled reason = %d, pc = 0x%s\n", reason, pr_addr (cia)); in signal_exception()
1900 sim_engine_restart (sd, NULL, NULL, NULL_CIA); in signal_exception()
1903 sim_io_eprintf(sd,"ReservedInstruction at PC = 0x%s\n", pr_addr (cia)); in signal_exception()
2062 SIM_DESC sd = CPU_STATE(cpu); in unpredictable_action() local
2064 sim_io_eprintf(sd, "UNPREDICTABLE: PC = 0x%s\n", pr_addr (cia)); in unpredictable_action()
2079 cop_lw (SIM_DESC sd, in cop_lw() argument
2100 …sim_io_printf(sd,"COP_LW(%d,%d,0x%08X) at PC = 0x%s : TODO (architecture specific)\n",coproc_num,c… in cop_lw()
2109 cop_ld (SIM_DESC sd, in cop_ld() argument
2131 …sim_io_printf(sd,"COP_LD(%d,%d,0x%s) at PC = 0x%s : TODO (architecture specific)\n",coproc_num,cop… in cop_ld()
2143 cop_sw (SIM_DESC sd, in cop_sw() argument
2162 …sim_io_printf(sd,"COP_SW(%d,%d) at PC = 0x%s : TODO (architecture specific)\n",coproc_num,coproc_r… in cop_sw()
2171 cop_sd (SIM_DESC sd, in cop_sd() argument
2189 …sim_io_printf(sd,"COP_SD(%d,%d) at PC = 0x%s : TODO (architecture specific)\n",coproc_num,coproc_r… in cop_sd()
2201 decode_coproc (SIM_DESC sd, in decode_coproc() argument
2339 …sim_io_printf(sd,"Warning: MFC0 %d,%d ignored, PC=%08x (architecture specific)\n",rt,rd, (unsigned… in decode_coproc()
2341 …sim_io_printf(sd,"Warning: MTC0 %d,%d ignored, PC=%08x (architecture specific)\n",rt,rd, (unsigned… in decode_coproc()
2385 sim_io_printf(sd,"Warning: ERET when SR[ERL] set not handled yet"); in decode_coproc()
2415 …sim_io_eprintf(sd,"Unrecognised COP0 instruction 0x%08X at PC = 0x%s : No handler present\n",instr… in decode_coproc()
2429 sim_io_eprintf(sd, "COP2 instruction 0x%08X at PC = 0x%s : No handler present\n", in decode_coproc()
2480 mips_core_signal (SIM_DESC sd, in mips_core_signal() argument
2495 sim_io_eprintf (sd, "mips-core: %d byte %s to unmapped address 0x%lx at 0x%lx\n", in mips_core_signal()
2504 sim_io_eprintf (sd, "mips-core: %d byte %s to unaligned address 0x%lx at 0x%lx\n", in mips_core_signal()
2516 sim_engine_abort (sd, cpu, cia, in mips_core_signal()
2523 mips_cpu_exception_trigger(SIM_DESC sd, sim_cpu* cpu, address_word cia) in mips_cpu_exception_trigger() argument
2530 sim_io_eprintf (sd, "Warning, nested exception triggered (%d)\n", in mips_cpu_exception_trigger()
2540 mips_cpu_exception_suspend(SIM_DESC sd, sim_cpu* cpu, int exception) in mips_cpu_exception_suspend() argument
2547 sim_io_eprintf(sd, "Warning, nested exception signal (%d then %d)\n", in mips_cpu_exception_suspend()
2558 mips_cpu_exception_resume(SIM_DESC sd, sim_cpu* cpu, int exception) in mips_cpu_exception_resume() argument
2567 if (mips_cpu->exc_suspended != sim_signal_to_host(sd, SIM_SIGTRAP)) in mips_cpu_exception_resume()
2568 sim_io_eprintf(sd, "Warning, resuming but ignoring pending exception signal (%d)\n", in mips_cpu_exception_resume()
2574 sim_io_eprintf(sd, "Warning, resuming with mismatched exception signal (%d vs %d)\n", in mips_cpu_exception_resume()
2582 sim_io_eprintf(sd, "Warning, ignoring spontanous exception signal (%d)\n", exception); in mips_cpu_exception_resume()