Lines Matching refs:state
32 void ARMul_Reset (ARMul_State * state);
33 ARMword ARMul_DoCycle (ARMul_State * state);
34 unsigned ARMul_DoCoPro (ARMul_State * state);
35 ARMword ARMul_DoProg (ARMul_State * state);
36 ARMword ARMul_DoInstr (ARMul_State * state);
37 void ARMul_Abort (ARMul_State * state, ARMword address);
82 ARMul_State *state; in ARMul_NewState() local
85 state = (ARMul_State *) malloc (sizeof (ARMul_State)); in ARMul_NewState()
86 memset (state, 0, sizeof (ARMul_State)); in ARMul_NewState()
88 state->Emulate = RUN; in ARMul_NewState()
91 state->Reg[i] = 0; in ARMul_NewState()
93 state->RegBank[j][i] = 0; in ARMul_NewState()
96 state->Spsr[i] = 0; in ARMul_NewState()
99 state->Mode = USER32MODE; in ARMul_NewState()
101 state->CallDebug = FALSE; in ARMul_NewState()
102 state->Debug = FALSE; in ARMul_NewState()
103 state->VectorCatch = 0; in ARMul_NewState()
104 state->Aborted = FALSE; in ARMul_NewState()
105 state->Reseted = FALSE; in ARMul_NewState()
106 state->Inted = 3; in ARMul_NewState()
107 state->LastInted = 3; in ARMul_NewState()
109 state->MemDataPtr = NULL; in ARMul_NewState()
110 state->MemInPtr = NULL; in ARMul_NewState()
111 state->MemOutPtr = NULL; in ARMul_NewState()
112 state->MemSparePtr = NULL; in ARMul_NewState()
113 state->MemSize = 0; in ARMul_NewState()
115 state->OSptr = NULL; in ARMul_NewState()
116 state->CommandLine = NULL; in ARMul_NewState()
118 state->CP14R0_CCD = -1; in ARMul_NewState()
119 state->LastTime = 0; in ARMul_NewState()
121 state->EventSet = 0; in ARMul_NewState()
122 state->Now = 0; in ARMul_NewState()
123 state->EventPtr = (struct EventNode **) malloc ((unsigned) EVENTLISTSIZE * in ARMul_NewState()
127 *(state->EventPtr + i) = NULL; in ARMul_NewState()
129 state->prog32Sig = HIGH; in ARMul_NewState()
130 state->data32Sig = HIGH; in ARMul_NewState()
132 state->lateabtSig = LOW; in ARMul_NewState()
133 state->bigendSig = LOW; in ARMul_NewState()
135 state->is_v4 = LOW; in ARMul_NewState()
136 state->is_v5 = LOW; in ARMul_NewState()
137 state->is_v5e = LOW; in ARMul_NewState()
138 state->is_XScale = LOW; in ARMul_NewState()
139 state->is_iWMMXt = LOW; in ARMul_NewState()
140 state->is_v6 = LOW; in ARMul_NewState()
142 ARMul_Reset (state); in ARMul_NewState()
144 return state; in ARMul_NewState()
152 ARMul_SelectProcessor (ARMul_State * state, unsigned properties) in ARMul_SelectProcessor() argument
156 state->prog32Sig = LOW; in ARMul_SelectProcessor()
157 state->data32Sig = LOW; in ARMul_SelectProcessor()
161 state->prog32Sig = HIGH; in ARMul_SelectProcessor()
162 state->data32Sig = HIGH; in ARMul_SelectProcessor()
165 state->lateabtSig = LOW; in ARMul_SelectProcessor()
167 state->is_v4 = (properties & (ARM_v4_Prop | ARM_v5_Prop)) ? HIGH : LOW; in ARMul_SelectProcessor()
168 state->is_v5 = (properties & ARM_v5_Prop) ? HIGH : LOW; in ARMul_SelectProcessor()
169 state->is_v5e = (properties & ARM_v5e_Prop) ? HIGH : LOW; in ARMul_SelectProcessor()
170 state->is_XScale = (properties & ARM_XScale_Prop) ? HIGH : LOW; in ARMul_SelectProcessor()
171 state->is_iWMMXt = (properties & ARM_iWMMXt_Prop) ? HIGH : LOW; in ARMul_SelectProcessor()
172 state->is_ep9312 = (properties & ARM_ep9312_Prop) ? HIGH : LOW; in ARMul_SelectProcessor()
173 state->is_v6 = (properties & ARM_v6_Prop) ? HIGH : LOW; in ARMul_SelectProcessor()
177 ARMul_CoProInit (state); in ARMul_SelectProcessor()
185 ARMul_Reset (ARMul_State * state) in ARMul_Reset() argument
187 state->NextInstr = 0; in ARMul_Reset()
189 if (state->prog32Sig) in ARMul_Reset()
191 state->Reg[15] = 0; in ARMul_Reset()
192 state->Cpsr = INTBITS | SVC32MODE; in ARMul_Reset()
193 state->Mode = SVC32MODE; in ARMul_Reset()
197 state->Reg[15] = R15INTBITS | SVC26MODE; in ARMul_Reset()
198 state->Cpsr = INTBITS | SVC26MODE; in ARMul_Reset()
199 state->Mode = SVC26MODE; in ARMul_Reset()
202 ARMul_CPSRAltered (state); in ARMul_Reset()
203 state->Bank = SVCBANK; in ARMul_Reset()
207 state->EndCondition = 0; in ARMul_Reset()
209 state->Exception = FALSE; in ARMul_Reset()
210 state->NresetSig = HIGH; in ARMul_Reset()
211 state->NfiqSig = HIGH; in ARMul_Reset()
212 state->NirqSig = HIGH; in ARMul_Reset()
213 state->NtransSig = (state->Mode & 3) ? HIGH : LOW; in ARMul_Reset()
214 state->abortSig = LOW; in ARMul_Reset()
215 state->AbortAddr = 1; in ARMul_Reset()
217 state->NumInstrs = 0; in ARMul_Reset()
218 state->NumNcycles = 0; in ARMul_Reset()
219 state->NumScycles = 0; in ARMul_Reset()
220 state->NumIcycles = 0; in ARMul_Reset()
221 state->NumCcycles = 0; in ARMul_Reset()
222 state->NumFcycles = 0; in ARMul_Reset()
225 ARMul_OSInit (state); in ARMul_Reset()
237 ARMul_DoProg (ARMul_State * state) in ARMul_DoProg() argument
241 state->Emulate = RUN; in ARMul_DoProg()
242 while (state->Emulate != STOP) in ARMul_DoProg()
244 state->Emulate = RUN; in ARMul_DoProg()
245 if (state->prog32Sig && ARMul_MODE32BIT) in ARMul_DoProg()
246 pc = ARMul_Emulate32 (state); in ARMul_DoProg()
248 pc = ARMul_Emulate26 (state); in ARMul_DoProg()
260 ARMul_DoInstr (ARMul_State * state) in ARMul_DoInstr() argument
264 state->Emulate = ONCE; in ARMul_DoInstr()
265 if (state->prog32Sig && ARMul_MODE32BIT) in ARMul_DoInstr()
266 pc = ARMul_Emulate32 (state); in ARMul_DoInstr()
268 pc = ARMul_Emulate26 (state); in ARMul_DoInstr()
280 ARMul_Abort (ARMul_State * state, ARMword vector) in ARMul_Abort() argument
287 state->Aborted = FALSE; in ARMul_Abort()
289 if (state->prog32Sig) in ARMul_Abort()
293 temp = state->Reg[15]; in ARMul_Abort()
300 SETABORT (INTBITS, state->prog32Sig ? SVC32MODE : SVC26MODE, 0); in ARMul_Abort()
303 SETABORT (IBIT, state->prog32Sig ? UNDEF32MODE : SVC26MODE, isize); in ARMul_Abort()
306 SETABORT (IBIT, state->prog32Sig ? SVC32MODE : SVC26MODE, isize); in ARMul_Abort()
309 state->AbortAddr = 1; in ARMul_Abort()
310 SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE, esize); in ARMul_Abort()
313 SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE, e2size); in ARMul_Abort()
319 if ( ! state->is_XScale in ARMul_Abort()
320 || ! state->CPRead[13] (state, 0, & temp) in ARMul_Abort()
322 SETABORT (IBIT, state->prog32Sig ? IRQ32MODE : IRQ26MODE, esize); in ARMul_Abort()
325 if ( ! state->is_XScale in ARMul_Abort()
326 || ! state->CPRead[13] (state, 0, & temp) in ARMul_Abort()
328 SETABORT (INTBITS, state->prog32Sig ? FIQ32MODE : FIQ26MODE, esize); in ARMul_Abort()
332 ARMul_SetR15 (state, vector); in ARMul_Abort()
334 ARMul_SetR15 (state, R15CCINTMODE | vector); in ARMul_Abort()
336 if (ARMul_ReadWord (state, ARMul_GetPC (state)) == 0) in ARMul_Abort()
343 case ARMul_ResetV: state->EndCondition = RDIError_Reset; break; in ARMul_Abort()
344 case ARMul_UndefinedInstrV: state->EndCondition = RDIError_UndefinedInstruction; break; in ARMul_Abort()
345 case ARMul_SWIV: state->EndCondition = RDIError_SoftwareInterrupt; break; in ARMul_Abort()
346 case ARMul_PrefetchAbortV: state->EndCondition = RDIError_PrefetchAbort; break; in ARMul_Abort()
347 case ARMul_DataAbortV: state->EndCondition = RDIError_DataAbort; break; in ARMul_Abort()
348 case ARMul_AddrExceptnV: state->EndCondition = RDIError_AddressException; break; in ARMul_Abort()
349 case ARMul_IRQV: state->EndCondition = RDIError_IRQ; break; in ARMul_Abort()
350 case ARMul_FIQV: state->EndCondition = RDIError_FIQ; break; in ARMul_Abort()
353 state->Emulate = FALSE; in ARMul_Abort()