Lines Matching refs:hp
55 #define HDEVNAME(hp) ((hp)->sc->sc_dev.dv_xname) argument
60 #define HREAD1(hp, reg) \ argument
61 (bus_space_read_1((hp)->iot, (hp)->ioh, (reg)))
62 #define HREAD2(hp, reg) \ argument
63 (bus_space_read_2((hp)->iot, (hp)->ioh, (reg)))
64 #define HREAD4(hp, reg) \ argument
65 (bus_space_read_4((hp)->iot, (hp)->ioh, (reg)))
66 #define HWRITE1(hp, reg, val) \ argument
67 bus_space_write_1((hp)->iot, (hp)->ioh, (reg), (val))
68 #define HWRITE2(hp, reg, val) \ argument
69 bus_space_write_2((hp)->iot, (hp)->ioh, (reg), (val))
70 #define HWRITE4(hp, reg, val) \ argument
71 bus_space_write_4((hp)->iot, (hp)->ioh, (reg), (val))
72 #define HCLR1(hp, reg, bits) \ argument
73 HWRITE1((hp), (reg), HREAD1((hp), (reg)) & ~(bits))
74 #define HCLR2(hp, reg, bits) \ argument
75 HWRITE2((hp), (reg), HREAD2((hp), (reg)) & ~(bits))
76 #define HSET1(hp, reg, bits) \ argument
77 HWRITE1((hp), (reg), HREAD1((hp), (reg)) | (bits))
78 #define HSET2(hp, reg, bits) \ argument
79 HWRITE2((hp), (reg), HREAD2((hp), (reg)) | (bits))
137 struct sdhc_host *hp; in sdhc_host_found() local
158 hp = malloc(sizeof(*hp), M_DEVBUF, M_WAITOK | M_ZERO); in sdhc_host_found()
159 sc->sc_host[sc->sc_nhosts - 1] = hp; in sdhc_host_found()
162 hp->sc = sc; in sdhc_host_found()
163 hp->iot = iot; in sdhc_host_found()
164 hp->ioh = ioh; in sdhc_host_found()
169 (void)sdhc_host_reset(hp); in sdhc_host_found()
172 caps = HREAD4(hp, SDHC_CAPABILITIES); in sdhc_host_found()
176 SET(hp->flags, SHF_USE_DMA); in sdhc_host_found()
182 hp->clkbase = SDHC_BASE_FREQ_KHZ(caps); in sdhc_host_found()
183 if (hp->clkbase == 0) { in sdhc_host_found()
188 } else if (hp->clkbase < 10000 || hp->clkbase > 63000) { in sdhc_host_found()
191 sc->sc_dev.dv_xname, hp->clkbase / 1000); in sdhc_host_found()
204 SET(hp->ocr, MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V); in sdhc_host_found()
206 SET(hp->ocr, MMC_OCR_2_9V_3_0V | MMC_OCR_3_0V_3_1V); in sdhc_host_found()
208 SET(hp->ocr, MMC_OCR_3_2V_3_3V | MMC_OCR_3_3V_3_4V); in sdhc_host_found()
216 hp->maxblklen = 512; in sdhc_host_found()
219 hp->maxblklen = 1024; in sdhc_host_found()
222 hp->maxblklen = 2048; in sdhc_host_found()
225 hp->maxblklen = 1; in sdhc_host_found()
236 saa.sch = hp; in sdhc_host_found()
238 hp->sdmmc = config_found(&sc->sc_dev, &saa, NULL); in sdhc_host_found()
239 if (hp->sdmmc == NULL) { in sdhc_host_found()
247 free(hp, M_DEVBUF); in sdhc_host_found()
260 struct sdhc_host *hp; in sdhc_power() local
271 hp = sc->sc_host[n]; in sdhc_power()
272 for (i = 0; i < sizeof hp->regs; i++) in sdhc_power()
273 hp->regs[i] = HREAD1(hp, i); in sdhc_power()
280 hp = sc->sc_host[n]; in sdhc_power()
281 (void)sdhc_host_reset(hp); in sdhc_power()
282 for (i = 0; i < sizeof hp->regs; i++) in sdhc_power()
283 HWRITE1(hp, i, hp->regs[i]); in sdhc_power()
296 struct sdhc_host *hp; in sdhc_shutdown() local
301 hp = sc->sc_host[i]; in sdhc_shutdown()
302 (void)sdhc_host_reset(hp); in sdhc_shutdown()
313 struct sdhc_host *hp = sch; in sdhc_host_reset() local
321 HWRITE2(hp, SDHC_NINTR_SIGNAL_EN, 0); in sdhc_host_reset()
327 if ((error = sdhc_soft_reset(hp, SDHC_RESET_ALL)) != 0) { in sdhc_host_reset()
333 HWRITE1(hp, SDHC_TIMEOUT_CTL, SDHC_TIMEOUT_MAX); in sdhc_host_reset()
341 HWRITE2(hp, SDHC_NINTR_STATUS_EN, imask); in sdhc_host_reset()
342 HWRITE2(hp, SDHC_EINTR_STATUS_EN, SDHC_EINTR_STATUS_MASK); in sdhc_host_reset()
343 HWRITE2(hp, SDHC_NINTR_SIGNAL_EN, imask); in sdhc_host_reset()
344 HWRITE2(hp, SDHC_EINTR_SIGNAL_EN, SDHC_EINTR_SIGNAL_MASK); in sdhc_host_reset()
353 struct sdhc_host *hp = sch; in sdhc_host_ocr() local
354 return hp->ocr; in sdhc_host_ocr()
360 struct sdhc_host *hp = sch; in sdhc_host_maxblklen() local
361 return hp->maxblklen; in sdhc_host_maxblklen()
370 struct sdhc_host *hp = sch; in sdhc_card_detect() local
371 return ISSET(HREAD4(hp, SDHC_PRESENT_STATE), SDHC_CARD_INSERTED) ? in sdhc_card_detect()
382 struct sdhc_host *hp = sch; in sdhc_bus_power() local
391 if (!(hp->sc->sc_flags & SDHC_F_NOPWR0)) in sdhc_bus_power()
392 HWRITE1(hp, SDHC_POWER_CTL, 0); in sdhc_bus_power()
397 (void)sdhc_host_reset(hp); in sdhc_bus_power()
404 ocr &= hp->ocr; in sdhc_bus_power()
421 HWRITE1(hp, SDHC_POWER_CTL, (vdd << SDHC_VOLTAGE_SHIFT) | in sdhc_bus_power()
430 if (!ISSET(HREAD1(hp, SDHC_POWER_CTL), SDHC_BUS_POWER)) { in sdhc_bus_power()
444 sdhc_clock_divisor(struct sdhc_host *hp, u_int freq) in sdhc_clock_divisor() argument
449 if ((hp->clkbase / div) <= freq) in sdhc_clock_divisor()
462 struct sdhc_host *hp = sch; in sdhc_bus_clock() local
472 if (ISSET(HREAD4(hp, SDHC_PRESENT_STATE), SDHC_CMD_INHIBIT_MASK) && in sdhc_bus_clock()
473 sdhc_card_detect(hp)) in sdhc_bus_clock()
480 HWRITE2(hp, SDHC_CLOCK_CTL, 0); in sdhc_bus_clock()
487 if ((div = sdhc_clock_divisor(hp, freq)) < 0) { in sdhc_bus_clock()
492 HWRITE2(hp, SDHC_CLOCK_CTL, div << SDHC_SDCLK_DIV_SHIFT); in sdhc_bus_clock()
497 HSET2(hp, SDHC_CLOCK_CTL, SDHC_INTCLK_ENABLE); in sdhc_bus_clock()
499 if (ISSET(HREAD2(hp, SDHC_CLOCK_CTL), SDHC_INTCLK_STABLE)) in sdhc_bus_clock()
511 HSET2(hp, SDHC_CLOCK_CTL, SDHC_SDCLK_ENABLE); in sdhc_bus_clock()
521 struct sdhc_host *hp = sch; in sdhc_card_intr_mask() local
524 HSET2(hp, SDHC_NINTR_STATUS_EN, SDHC_CARD_INTERRUPT); in sdhc_card_intr_mask()
525 HSET2(hp, SDHC_NINTR_SIGNAL_EN, SDHC_CARD_INTERRUPT); in sdhc_card_intr_mask()
527 HCLR2(hp, SDHC_NINTR_SIGNAL_EN, SDHC_CARD_INTERRUPT); in sdhc_card_intr_mask()
528 HCLR2(hp, SDHC_NINTR_STATUS_EN, SDHC_CARD_INTERRUPT); in sdhc_card_intr_mask()
535 struct sdhc_host *hp = sch; in sdhc_card_intr_ack() local
537 HSET2(hp, SDHC_NINTR_STATUS_EN, SDHC_CARD_INTERRUPT); in sdhc_card_intr_ack()
541 sdhc_wait_state(struct sdhc_host *hp, u_int32_t mask, u_int32_t value) in sdhc_wait_state() argument
547 if (((state = HREAD4(hp, SDHC_PRESENT_STATE)) & mask) in sdhc_wait_state()
552 DPRINTF(0,("%s: timeout waiting for %x (state=%b)\n", HDEVNAME(hp), in sdhc_wait_state()
560 struct sdhc_host *hp = sch; in sdhc_exec_command() local
566 error = sdhc_start_command(hp, cmd); in sdhc_exec_command()
577 if (!sdhc_wait_intr(hp, SDHC_COMMAND_COMPLETE, in sdhc_exec_command()
595 *p++ = HREAD1(hp, SDHC_RESPONSE + i); in sdhc_exec_command()
597 cmd->c_resp[0] = HREAD4(hp, SDHC_RESPONSE); in sdhc_exec_command()
605 sdhc_transfer_data(hp, cmd); in sdhc_exec_command()
608 HCLR1(hp, SDHC_HOST_CTL, SDHC_LED_ON); in sdhc_exec_command()
611 HDEVNAME(hp), cmd->c_opcode, cmd->c_flags, cmd->c_error)); in sdhc_exec_command()
616 sdhc_start_command(struct sdhc_host *hp, struct sdmmc_command *cmd) in sdhc_start_command() argument
626 "proc=\"%s\"\n", HDEVNAME(hp), cmd->c_opcode, cmd->c_arg, in sdhc_start_command()
642 HDEVNAME(hp), blksize); in sdhc_start_command()
649 printf("%s: too much data\n", HDEVNAME(hp)); in sdhc_start_command()
666 if (ISSET(hp->flags, SHF_USE_DMA)) in sdhc_start_command()
693 if ((error = sdhc_wait_state(hp, SDHC_CMD_INHIBIT_MASK, 0)) != 0) in sdhc_start_command()
699 HSET1(hp, SDHC_HOST_CTL, SDHC_LED_ON); in sdhc_start_command()
704 HDEVNAME(hp), command, mode, blksize, blkcount)); in sdhc_start_command()
710 HWRITE2(hp, SDHC_TRANSFER_MODE, mode); in sdhc_start_command()
711 HWRITE2(hp, SDHC_BLOCK_SIZE, blksize); in sdhc_start_command()
713 HWRITE2(hp, SDHC_BLOCK_COUNT, blkcount); in sdhc_start_command()
714 HWRITE4(hp, SDHC_ARGUMENT, cmd->c_arg); in sdhc_start_command()
715 HWRITE2(hp, SDHC_COMMAND, command); in sdhc_start_command()
722 sdhc_transfer_data(struct sdhc_host *hp, struct sdmmc_command *cmd) in sdhc_transfer_data() argument
734 DPRINTF(1,("%s: resp=%#x datalen=%d\n", HDEVNAME(hp), in sdhc_transfer_data()
742 HDEVNAME(hp), MMC_R1(cmd->c_resp) & 0xff00); in sdhc_transfer_data()
746 if (!sdhc_wait_intr(hp, SDHC_BUFFER_READ_READY| in sdhc_transfer_data()
752 if ((error = sdhc_wait_state(hp, mask, mask)) != 0) in sdhc_transfer_data()
757 sdhc_read_data(hp, datap, i); in sdhc_transfer_data()
759 sdhc_write_data(hp, datap, i); in sdhc_transfer_data()
765 if (error == 0 && !sdhc_wait_intr(hp, SDHC_TRANSFER_COMPLETE, in sdhc_transfer_data()
774 HDEVNAME(hp), cmd->c_error)); in sdhc_transfer_data()
778 sdhc_read_data(struct sdhc_host *hp, u_char *datap, int datalen) in sdhc_read_data() argument
781 *(u_int32_t *)datap = HREAD4(hp, SDHC_DATA); in sdhc_read_data()
786 u_int32_t rv = HREAD4(hp, SDHC_DATA); in sdhc_read_data()
795 sdhc_write_data(struct sdhc_host *hp, u_char *datap, int datalen) in sdhc_write_data() argument
799 HWRITE4(hp, SDHC_DATA, *((u_int32_t *)datap)); in sdhc_write_data()
810 HWRITE4(hp, SDHC_DATA, rv); in sdhc_write_data()
816 sdhc_soft_reset(struct sdhc_host *hp, int mask) in sdhc_soft_reset() argument
820 DPRINTF(1,("%s: software reset reg=%#x\n", HDEVNAME(hp), mask)); in sdhc_soft_reset()
822 HWRITE1(hp, SDHC_SOFTWARE_RESET, mask); in sdhc_soft_reset()
824 if (!ISSET(HREAD1(hp, SDHC_SOFTWARE_RESET), mask)) in sdhc_soft_reset()
827 HWRITE1(hp, SDHC_SOFTWARE_RESET, 0); in sdhc_soft_reset()
830 DPRINTF(1,("%s: timeout reg=%#x\n", HDEVNAME(hp), in sdhc_soft_reset()
831 HREAD1(hp, SDHC_SOFTWARE_RESET))); in sdhc_soft_reset()
832 HWRITE1(hp, SDHC_SOFTWARE_RESET, 0); in sdhc_soft_reset()
840 sdhc_wait_intr(struct sdhc_host *hp, int mask, int timo) in sdhc_wait_intr() argument
848 status = hp->intr_status & mask; in sdhc_wait_intr()
850 if (tsleep(&hp->intr_status, PWAIT, "hcintr", timo) in sdhc_wait_intr()
855 status = hp->intr_status & mask; in sdhc_wait_intr()
857 hp->intr_status &= ~status; in sdhc_wait_intr()
859 DPRINTF(2,("%s: intr status %#x error %#x\n", HDEVNAME(hp), status, in sdhc_wait_intr()
860 hp->intr_error_status)); in sdhc_wait_intr()
864 hp->intr_error_status = 0; in sdhc_wait_intr()
865 (void)sdhc_soft_reset(hp, SDHC_RESET_DAT|SDHC_RESET_CMD); in sdhc_wait_intr()
885 struct sdhc_host *hp = sc->sc_host[host]; in sdhc_intr() local
888 if (hp == NULL) in sdhc_intr()
892 status = HREAD2(hp, SDHC_NINTR_STATUS); in sdhc_intr()
897 HWRITE2(hp, SDHC_NINTR_STATUS, status); in sdhc_intr()
898 DPRINTF(2,("%s: interrupt status=%b\n", HDEVNAME(hp), in sdhc_intr()
911 error = HREAD2(hp, SDHC_EINTR_STATUS); in sdhc_intr()
912 HWRITE2(hp, SDHC_EINTR_STATUS, error); in sdhc_intr()
914 HDEVNAME(hp), error, SDHC_EINTR_STATUS_BITS)); in sdhc_intr()
918 hp->intr_error_status |= error; in sdhc_intr()
919 hp->intr_status |= status; in sdhc_intr()
920 wakeup(&hp->intr_status); in sdhc_intr()
928 sdmmc_needs_discover(hp->sdmmc); in sdhc_intr()
937 hp->intr_status |= status; in sdhc_intr()
938 wakeup(&hp->intr_status); in sdhc_intr()
945 DPRINTF(0,("%s: card interrupt\n", HDEVNAME(hp))); in sdhc_intr()
946 HCLR2(hp, SDHC_NINTR_STATUS_EN, SDHC_CARD_INTERRUPT); in sdhc_intr()
947 sdmmc_card_intr(hp->sdmmc); in sdhc_intr()
955 sdhc_dump_regs(struct sdhc_host *hp) in sdhc_dump_regs() argument
958 HREAD4(hp, SDHC_PRESENT_STATE), SDHC_PRESENT_STATE_BITS); in sdhc_dump_regs()
960 HREAD1(hp, SDHC_POWER_CTL)); in sdhc_dump_regs()
962 HREAD2(hp, SDHC_NINTR_STATUS)); in sdhc_dump_regs()
964 HREAD2(hp, SDHC_EINTR_STATUS)); in sdhc_dump_regs()
966 HREAD2(hp, SDHC_NINTR_STATUS_EN)); in sdhc_dump_regs()
968 HREAD2(hp, SDHC_EINTR_STATUS_EN)); in sdhc_dump_regs()
970 HREAD2(hp, SDHC_NINTR_SIGNAL_EN)); in sdhc_dump_regs()
972 HREAD2(hp, SDHC_EINTR_SIGNAL_EN)); in sdhc_dump_regs()
974 HREAD4(hp, SDHC_CAPABILITIES)); in sdhc_dump_regs()
976 HREAD4(hp, SDHC_MAX_CAPABILITIES)); in sdhc_dump_regs()