Lines Matching refs:MACH_BASE
48 { "base", MACH_BASE },
238 { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
239 { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
240 { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
241 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
242 { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
243 { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { (1<<MACH_BASE) } } },
244 { "h-hi16", HW_H_HI16, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
245 { "h-slo16", HW_H_SLO16, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
246 { "h-ulo16", HW_H_ULO16, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
247 …SM_KEYWORD, (PTR) & m32r_cgen_opval_gr_names, { 0|A(CACHE_ADDR)|A(PROFILE), { (1<<MACH_BASE) } } },
248 …{ "h-cr", HW_H_CR, CGEN_ASM_KEYWORD, (PTR) & m32r_cgen_opval_cr_names, { 0, { (1<<MACH_BASE) } } },
249 { "h-accum", HW_H_ACCUM, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
251 { "h-cond", HW_H_COND, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
252 { "h-psw", HW_H_PSW, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
253 { "h-bpsw", HW_H_BPSW, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
254 { "h-bbpsw", HW_H_BBPSW, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
255 { "h-lock", HW_H_LOCK, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
272 { M32R_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { (1<<MACH_BASE) } } },
273 { M32R_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { (1<<MACH_BASE) } } },
274 { M32R_F_OP1, "f-op1", 0, 32, 0, 4, { 0, { (1<<MACH_BASE) } } },
275 { M32R_F_OP2, "f-op2", 0, 32, 8, 4, { 0, { (1<<MACH_BASE) } } },
276 { M32R_F_COND, "f-cond", 0, 32, 4, 4, { 0, { (1<<MACH_BASE) } } },
277 { M32R_F_R1, "f-r1", 0, 32, 4, 4, { 0, { (1<<MACH_BASE) } } },
278 { M32R_F_R2, "f-r2", 0, 32, 12, 4, { 0, { (1<<MACH_BASE) } } },
279 { M32R_F_SIMM8, "f-simm8", 0, 32, 8, 8, { 0, { (1<<MACH_BASE) } } },
280 { M32R_F_SIMM16, "f-simm16", 0, 32, 16, 16, { 0, { (1<<MACH_BASE) } } },
281 { M32R_F_SHIFT_OP2, "f-shift-op2", 0, 32, 8, 3, { 0, { (1<<MACH_BASE) } } },
282 { M32R_F_UIMM3, "f-uimm3", 0, 32, 5, 3, { 0, { (1<<MACH_BASE) } } },
283 { M32R_F_UIMM4, "f-uimm4", 0, 32, 12, 4, { 0, { (1<<MACH_BASE) } } },
284 { M32R_F_UIMM5, "f-uimm5", 0, 32, 11, 5, { 0, { (1<<MACH_BASE) } } },
285 { M32R_F_UIMM8, "f-uimm8", 0, 32, 8, 8, { 0, { (1<<MACH_BASE) } } },
286 { M32R_F_UIMM16, "f-uimm16", 0, 32, 16, 16, { 0, { (1<<MACH_BASE) } } },
287 { M32R_F_UIMM24, "f-uimm24", 0, 32, 8, 24, { 0|A(RELOC)|A(ABS_ADDR), { (1<<MACH_BASE) } } },
288 { M32R_F_HI16, "f-hi16", 0, 32, 16, 16, { 0|A(SIGN_OPT), { (1<<MACH_BASE) } } },
289 { M32R_F_DISP8, "f-disp8", 0, 32, 8, 8, { 0|A(RELOC)|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
290 { M32R_F_DISP16, "f-disp16", 0, 32, 16, 16, { 0|A(RELOC)|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
291 { M32R_F_DISP24, "f-disp24", 0, 32, 8, 24, { 0|A(RELOC)|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
292 { M32R_F_OP23, "f-op23", 0, 32, 9, 3, { 0, { (1<<MACH_BASE) } } },
293 { M32R_F_OP3, "f-op3", 0, 32, 14, 2, { 0, { (1<<MACH_BASE) } } },
294 { M32R_F_ACC, "f-acc", 0, 32, 8, 1, { 0, { (1<<MACH_BASE) } } },
295 { M32R_F_ACCS, "f-accs", 0, 32, 12, 2, { 0, { (1<<MACH_BASE) } } },
296 { M32R_F_ACCD, "f-accd", 0, 32, 4, 2, { 0, { (1<<MACH_BASE) } } },
297 { M32R_F_BITS67, "f-bits67", 0, 32, 6, 2, { 0, { (1<<MACH_BASE) } } },
298 { M32R_F_BIT4, "f-bit4", 0, 32, 4, 1, { 0, { (1<<MACH_BASE) } } },
299 { M32R_F_BIT14, "f-bit14", 0, 32, 14, 1, { 0, { (1<<MACH_BASE) } } },
300 { M32R_F_IMM1, "f-imm1", 0, 32, 15, 1, { 0, { (1<<MACH_BASE) } } },
333 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
337 { 0, { (1<<MACH_BASE) } } },
341 { 0, { (1<<MACH_BASE) } } },
345 { 0, { (1<<MACH_BASE) } } },
349 { 0, { (1<<MACH_BASE) } } },
353 { 0, { (1<<MACH_BASE) } } },
357 { 0, { (1<<MACH_BASE) } } },
361 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
365 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
369 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
373 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
377 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
381 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
385 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
405 { 0, { (1<<MACH_BASE) } } },
409 { 0|A(SIGN_OPT), { (1<<MACH_BASE) } } },
413 { 0, { (1<<MACH_BASE) } } },
417 { 0, { (1<<MACH_BASE) } } },
421 { 0|A(HASH_PREFIX)|A(RELOC)|A(ABS_ADDR), { (1<<MACH_BASE) } } },
425 { 0|A(RELAX)|A(RELOC)|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
429 { 0|A(RELOC)|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
433 { 0|A(RELAX)|A(RELOC)|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
437 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
441 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
469 { 0, { (1<<MACH_BASE), PIPE_OS } }
474 { 0, { (1<<MACH_BASE), PIPE_NONE } }
479 { 0, { (1<<MACH_BASE), PIPE_OS } }
484 { 0, { (1<<MACH_BASE), PIPE_NONE } }
489 { 0, { (1<<MACH_BASE), PIPE_OS } }
494 { 0, { (1<<MACH_BASE), PIPE_NONE } }
499 { 0, { (1<<MACH_BASE), PIPE_OS } }
504 { 0, { (1<<MACH_BASE), PIPE_NONE } }
509 { 0, { (1<<MACH_BASE), PIPE_OS } }
514 { 0, { (1<<MACH_BASE), PIPE_OS } }
519 { 0, { (1<<MACH_BASE), PIPE_NONE } }
524 { 0, { (1<<MACH_BASE), PIPE_OS } }
529 { 0|A(COND_CTI), { (1<<MACH_BASE), PIPE_O } }
534 { 0|A(COND_CTI), { (1<<MACH_BASE), PIPE_NONE } }
539 { 0|A(COND_CTI), { (1<<MACH_BASE), PIPE_NONE } }
544 { 0|A(COND_CTI), { (1<<MACH_BASE), PIPE_NONE } }
549 { 0|A(COND_CTI), { (1<<MACH_BASE), PIPE_NONE } }
554 { 0|A(COND_CTI), { (1<<MACH_BASE), PIPE_NONE } }
559 { 0|A(COND_CTI), { (1<<MACH_BASE), PIPE_NONE } }
564 { 0|A(COND_CTI), { (1<<MACH_BASE), PIPE_NONE } }
569 { 0|A(COND_CTI), { (1<<MACH_BASE), PIPE_NONE } }
574 { 0|A(FILL_SLOT)|A(UNCOND_CTI), { (1<<MACH_BASE), PIPE_O } }
579 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), PIPE_NONE } }
594 { 0|A(COND_CTI), { (1<<MACH_BASE), PIPE_O } }
599 { 0|A(COND_CTI), { (1<<MACH_BASE), PIPE_NONE } }
604 { 0|A(COND_CTI), { (1<<MACH_BASE), PIPE_NONE } }
609 { 0|A(FILL_SLOT)|A(UNCOND_CTI), { (1<<MACH_BASE), PIPE_O } }
614 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), PIPE_NONE } }
629 { 0, { (1<<MACH_BASE), PIPE_OS } }
634 { 0, { (1<<MACH_BASE), PIPE_NONE } }
639 { 0, { (1<<MACH_BASE), PIPE_OS } }
644 { 0, { (1<<MACH_BASE), PIPE_NONE } }
659 { 0, { (1<<MACH_BASE), PIPE_NONE } }
664 { 0, { (1<<MACH_BASE), PIPE_NONE } }
669 { 0, { (1<<MACH_BASE), PIPE_NONE } }
674 { 0, { (1<<MACH_BASE), PIPE_NONE } }
729 { 0|A(FILL_SLOT)|A(UNCOND_CTI), { (1<<MACH_BASE), PIPE_O } }
734 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), PIPE_O } }
739 { 0, { (1<<MACH_BASE), PIPE_O } }
744 { 0, { (1<<MACH_BASE), PIPE_NONE } }
749 { 0, { (1<<MACH_BASE), PIPE_O } }
754 { 0, { (1<<MACH_BASE), PIPE_NONE } }
759 { 0, { (1<<MACH_BASE), PIPE_O } }
764 { 0, { (1<<MACH_BASE), PIPE_NONE } }
769 { 0, { (1<<MACH_BASE), PIPE_O } }
774 { 0, { (1<<MACH_BASE), PIPE_NONE } }
779 { 0, { (1<<MACH_BASE), PIPE_O } }
784 { 0, { (1<<MACH_BASE), PIPE_NONE } }
789 { 0, { (1<<MACH_BASE), PIPE_O } }
794 { 0, { (1<<MACH_BASE), PIPE_NONE } }
799 { 0, { (1<<MACH_BASE), PIPE_OS } }
804 { 0, { (1<<MACH_BASE), PIPE_NONE } }
809 { 0, { (1<<MACH_BASE), PIPE_O } }
854 { 0, { (1<<MACH_BASE), PIPE_S } }
899 { 0, { (1<<MACH_BASE), PIPE_OS } }
934 { 0, { (1<<MACH_BASE), PIPE_O } }
959 { 0, { (1<<MACH_BASE), PIPE_O } }
964 { 0, { (1<<MACH_BASE), PIPE_OS } }
969 { 0, { (1<<MACH_BASE), PIPE_OS } }
974 { 0, { (1<<MACH_BASE), PIPE_OS } }
999 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), PIPE_O } }
1004 { 0, { (1<<MACH_BASE), PIPE_NONE } }
1009 { 0, { (1<<MACH_BASE), PIPE_O_OS } }
1014 { 0, { (1<<MACH_BASE), PIPE_NONE } }
1019 { 0, { (1<<MACH_BASE), PIPE_O_OS } }
1024 { 0, { (1<<MACH_BASE), PIPE_O_OS } }
1029 { 0, { (1<<MACH_BASE), PIPE_NONE } }
1034 { 0, { (1<<MACH_BASE), PIPE_O_OS } }
1039 { 0, { (1<<MACH_BASE), PIPE_O_OS } }
1044 { 0, { (1<<MACH_BASE), PIPE_NONE } }
1049 { 0, { (1<<MACH_BASE), PIPE_O_OS } }
1054 { 0, { (1<<MACH_BASE), PIPE_O } }
1059 { 0, { (1<<MACH_BASE), PIPE_NONE } }
1064 { 0, { (1<<MACH_BASE), PIPE_O } }
1069 { 0, { (1<<MACH_BASE), PIPE_NONE } }
1074 { 0, { (1<<MACH_BASE), PIPE_O } }
1079 { 0, { (1<<MACH_BASE), PIPE_NONE } }
1084 { 0, { (1<<MACH_BASE), PIPE_O } }
1099 { 0, { (1<<MACH_BASE), PIPE_O } }
1104 { 0, { (1<<MACH_BASE), PIPE_OS } }
1109 { 0, { (1<<MACH_BASE), PIPE_OS } }
1114 { 0, { (1<<MACH_BASE), PIPE_OS } }
1119 { 0|A(FILL_SLOT)|A(UNCOND_CTI), { (1<<MACH_BASE), PIPE_O } }
1124 { 0, { (1<<MACH_BASE), PIPE_O } }
1184 { 0|A(SPECIAL_M32R), { (1<<MACH_BASE), PIPE_O } }
1189 { 0|A(SPECIAL_M32R), { (1<<MACH_BASE), PIPE_O } }
1194 { 0|A(SPECIAL_M32R), { (1<<MACH_BASE), PIPE_NONE } }
1199 { 0|A(SPECIAL_M32R), { (1<<MACH_BASE), PIPE_NONE } }
1204 { 0|A(SPECIAL_M32R), { (1<<MACH_BASE), PIPE_O } }