Lines Matching refs:dr
241 ((sr INT -1) (dr INT -1)) ; inputs
242 ((dr INT -1)) ; outputs
272 ((dr INT)) ; outputs
307 ((sr INT -1) (dr INT -1)) ; inputs
308 ((dr INT -1)) ; outputs
336 ((dr INT)) ; outputs
360 ((sr INT -1) (dr INT -1)) ; inputs
361 ((dr INT -1)) ; outputs
389 ((dr INT)) ; outputs
655 (dnop dr "destination register" () h-gr f-r1)
656 ;; The assembler relies upon the fact that dr and src1 are the same field.
809 (.str mnemonic " $dr,$sr")
810 (+ OP1_0 op2-op dr sr)
811 (set dr (sem-op dr sr))
817 (.str mnemonic "3 $dr,$sr," imm-prefix "$" imm)
818 (+ OP1_8 op2-op dr sr imm)
819 (set dr (sem-op sr imm))
832 ;#.(string-append "addi " "$dr,$simm8") ; #. experiment
833 "addi $dr,$simm8"
834 (+ OP1_4 dr simm8)
835 (set dr (add dr simm8))
843 "addv $dr,$sr"
844 (+ OP1_0 OP2_8 dr sr)
846 (set dr (add dr sr))
847 (set condbit (add-oflag dr sr (const 0))))
853 "addv3 $dr,$sr,$simm16"
854 (+ OP1_8 OP2_8 dr sr simm16)
856 (set dr (add sr simm16))
863 "addx $dr,$sr"
864 (+ OP1_0 OP2_9 dr sr)
866 (set dr (addc dr sr condbit))
867 (set condbit (add-cflag dr sr condbit)))
1177 "div $dr,$sr"
1178 (+ OP1_9 OP2_0 dr sr (f-simm16 0))
1179 (if (ne sr (const 0)) (set dr (div dr sr)))
1187 "divu $dr,$sr"
1188 (+ OP1_9 OP2_1 dr sr (f-simm16 0))
1189 (if (ne sr (const 0)) (set dr (udiv dr sr)))
1197 "rem $dr,$sr"
1198 (+ OP1_9 OP2_2 dr sr (f-simm16 0))
1200 (if (ne sr (const 0)) (set dr (mod dr sr)))
1208 "remu $dr,$sr"
1209 (+ OP1_9 OP2_3 dr sr (f-simm16 0))
1211 (if (ne sr (const 0)) (set dr (umod dr sr)))
1219 "remh $dr,$sr"
1220 (+ OP1_9 OP2_2 dr sr (f-simm16 #x10))
1222 (if (ne sr (const 0)) (set dr (mod (ext WI (trunc HI dr)) sr)))
1228 "remuh $dr,$sr"
1229 (+ OP1_9 OP2_3 dr sr (f-simm16 #x10))
1231 (if (ne sr (const 0)) (set dr (umod dr sr)))
1237 "remb $dr,$sr"
1238 (+ OP1_9 OP2_2 dr sr (f-simm16 #x18))
1240 (if (ne sr (const 0)) (set dr (mod (ext WI (trunc BI dr)) sr)))
1246 "remub $dr,$sr"
1247 (+ OP1_9 OP2_3 dr sr (f-simm16 #x18))
1249 (if (ne sr (const 0)) (set dr (umod dr sr)))
1255 "divuh $dr,$sr"
1256 (+ OP1_9 OP2_1 dr sr (f-simm16 #x10))
1257 (if (ne sr (const 0)) (set dr (udiv dr sr)))
1263 "divb $dr,$sr"
1264 (+ OP1_9 OP2_0 dr sr (f-simm16 #x18))
1265 (if (ne sr (const 0)) (set dr (div (ext WI (trunc BI dr)) sr)))
1271 "divub $dr,$sr"
1272 (+ OP1_9 OP2_1 dr sr (f-simm16 #x18))
1273 (if (ne sr (const 0)) (set dr (udiv dr sr)))
1279 "divh $dr,$sr"
1280 (+ OP1_9 OP2_0 dr sr (f-simm16 #x10))
1281 (if (ne sr (const 0)) (set dr (div (ext WI (trunc HI dr)) sr)))
1348 (.str "ld" suffix " $dr,@$sr")
1349 (+ OP1_2 op2-op dr sr)
1350 (set dr (ext-op WI (mem mode sr)))
1357 (.str "ld" suffix " $dr,@($sr)")
1358 (emit (.sym ld suffix) dr sr))
1361 (.str "ld" suffix " $dr,@($slo16,$sr)")
1362 (+ OP1_10 op2-op dr sr slo16)
1363 (set dr (ext-op WI (mem mode (add sr slo16))))
1370 (.str "ld" suffix " $dr,@($sr,$slo16)")
1371 (emit (.sym ld suffix -d) dr sr slo16))
1382 "ld $dr,@$sr+"
1383 (+ OP1_2 dr OP2_14 sr)
1386 ;(set dr (name ld-mem (mem WI sr)))
1387 (set dr (mem WI sr))
1399 (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
1401 (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
1403 (unit u-exec (in sr #f) (in dr sr) (out dr sr) (cycles 0) (pred (const 1))))
1409 "pop $dr"
1410 (emit ld-plus dr (sr 15)) ; "ld %0,@sp+"
1415 "ld24 $dr,$uimm24"
1416 (+ OP1_14 dr uimm24)
1417 (set dr uimm24)
1425 "ldi8 $dr,$simm8"
1426 (+ OP1_6 dr simm8)
1427 (set dr simm8)
1433 "ldi $dr,$simm8"
1434 (emit ldi8 dr simm8)
1439 "ldi16 $dr,$hash$slo16"
1440 (+ OP1_9 OP2_15 (f-r2 0) dr slo16)
1441 (set dr slo16)
1447 "ldi $dr,$hash$slo16"
1448 (emit ldi16 dr slo16)
1453 "lock $dr,@$sr"
1454 (+ OP1_2 OP2_13 dr sr)
1457 (set dr (mem WI sr)))
1601 "mul $dr,$sr"
1602 (+ OP1_1 OP2_6 dr sr)
1603 (set dr (mul dr sr))
1727 "mv $dr,$sr"
1728 (+ OP1_1 OP2_8 dr sr)
1729 (set dr sr)
1735 "mvfachi $dr"
1736 (+ OP1_5 OP2_15 (f-r2 0) dr)
1737 (set dr (trunc WI (sra DI accum (const 32))))
1743 "mvfachi $dr,$accs"
1744 (+ OP1_5 dr OP2_15 accs (f-op3 0))
1745 (set dr (trunc WI (sra DI accs (const 32))))
1752 "mvfaclo $dr"
1753 (+ OP1_5 OP2_15 (f-r2 1) dr)
1754 (set dr (trunc WI accum))
1760 "mvfaclo $dr,$accs"
1761 (+ OP1_5 dr OP2_15 accs (f-op3 1))
1762 (set dr (trunc WI accs))
1769 "mvfacmi $dr"
1770 (+ OP1_5 OP2_15 (f-r2 2) dr)
1771 (set dr (trunc WI (sra DI accum (const 16))))
1777 "mvfacmi $dr,$accs"
1778 (+ OP1_5 dr OP2_15 accs (f-op3 2))
1779 (set dr (trunc WI (sra DI accs (const 16))))
1786 "mvfc $dr,$scr"
1787 (+ OP1_1 OP2_9 dr scr)
1788 (set dr scr)
1848 "neg $dr,$sr"
1849 (+ OP1_0 OP2_3 dr sr)
1850 (set dr (neg sr))
1868 "not $dr,$sr"
1869 (+ OP1_0 OP2_11 dr sr)
1870 (set dr (inv sr))
2001 "seth $dr,$hash$hi16"
2002 (+ OP1_13 OP2_12 dr (f-r2 0) hi16)
2003 (set dr (sll WI hi16 (const 16)))
2010 (.str sym " $dr,$sr")
2011 (+ OP1_1 op2-r-op dr sr)
2012 (set dr (sem-op dr (and sr (const 31))))
2016 (.str sym "3 $dr,$sr,$simm16")
2017 (+ OP1_9 op2-3-op dr sr simm16)
2018 (set dr (sem-op sr (and WI simm16 (const 31))))
2022 (.str sym "i $dr,$uimm5")
2023 (+ OP1_5 (f-shift-op2 op2-i-op) dr uimm5)
2024 (set dr (sem-op dr uimm5))
2077 (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
2079 (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
2081 (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
2095 (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
2097 (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
2111 (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
2113 (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
2131 (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
2133 (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
2135 (unit u-exec (in dr src2) (out dr src2) (cycles 0)))
2146 "sub $dr,$sr"
2147 (+ OP1_0 OP2_2 dr sr)
2148 (set dr (sub dr sr))
2154 "subv $dr,$sr"
2155 (+ OP1_0 OP2_0 dr sr)
2157 (set dr (sub dr sr))
2158 (set condbit (sub-oflag dr sr (const 0))))
2164 "subx $dr,$sr"
2165 (+ OP1_0 OP2_1 dr sr)
2167 (set dr (subc dr sr condbit))
2168 (set condbit (sub-cflag dr sr condbit)))
2211 "satb $dr,$sr"
2212 (+ OP1_8 dr OP2_6 sr (f-uimm16 #x0300))
2213 (set dr
2225 "sath $dr,$sr"
2226 (+ OP1_8 dr OP2_6 sr (f-uimm16 #x0200))
2227 (set dr
2238 "sat $dr,$sr"
2239 (+ OP1_8 dr OP2_6 sr (f-uimm16 0))
2240 (set dr