Lines Matching refs:BitIdx
5271 int BitIdx = N.getConstantOperandVal(2); in getTargetShuffleMask() local
5272 DecodeEXTRQIMask(NumElems, MaskEltSize, BitLen, BitIdx, Mask); in getTargetShuffleMask()
5282 int BitIdx = N.getConstantOperandVal(3); in getTargetShuffleMask() local
5283 DecodeINSERTQIMask(NumElems, MaskEltSize, BitLen, BitIdx, Mask); in getTargetShuffleMask()
9693 int BitIdx = ExpectedIdx < Size ? ExpectedIdx : (ExpectedIdx - Size); in isTargetShuffleEquivalent() local
9695 ZeroMask.setBit(BitIdx); in isTargetShuffleEquivalent()
11743 uint64_t &BitIdx, const APInt &Zeroable) { in matchShuffleAsEXTRQ() argument
11789 BitIdx = (Idx * VT.getScalarSizeInBits()) & 0x3f; in matchShuffleAsEXTRQ()
11799 uint64_t &BitIdx) { in matchShuffleAsINSERTQ() argument
11852 BitIdx = (Idx * VT.getScalarSizeInBits()) & 0x3f; in matchShuffleAsINSERTQ()
11866 uint64_t BitLen, BitIdx; in lowerShuffleWithSSE4A() local
11867 if (matchShuffleAsEXTRQ(VT, V1, V2, Mask, BitLen, BitIdx, Zeroable)) in lowerShuffleWithSSE4A()
11870 DAG.getTargetConstant(BitIdx, DL, MVT::i8)); in lowerShuffleWithSSE4A()
11872 if (matchShuffleAsINSERTQ(VT, V1, V2, Mask, BitLen, BitIdx)) in lowerShuffleWithSSE4A()
11876 DAG.getTargetConstant(BitIdx, DL, MVT::i8)); in lowerShuffleWithSSE4A()
38899 uint64_t BitLen, BitIdx; in combineX86ShuffleChain() local
38900 if (matchShuffleAsEXTRQ(IntMaskVT, V1, V2, Mask, BitLen, BitIdx, in combineX86ShuffleChain()
38907 DAG.getTargetConstant(BitIdx, DL, MVT::i8)); in combineX86ShuffleChain()
38911 if (matchShuffleAsINSERTQ(IntMaskVT, V1, V2, Mask, BitLen, BitIdx)) { in combineX86ShuffleChain()
38918 DAG.getTargetConstant(BitIdx, DL, MVT::i8)); in combineX86ShuffleChain()
45434 int BitIdx = (i % EltSizeInBits); in combineToExtendBoolVectorInReg() local
45435 APInt Bit = APInt::getBitsSet(EltSizeInBits, BitIdx, BitIdx + 1); in combineToExtendBoolVectorInReg()