60   StackPtr = TRI->getStackRegister();  in X86FrameLowering()
270       MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AddSubRROpc), StackPtr)  in emitSPUpdate()
271                              .addReg(StackPtr)  in emitSPUpdate()
298                              .addReg(StackPtr);  in emitSPUpdate()
303           StackPtr, false, 0);  in emitSPUpdate()
305       addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), StackPtr),  in emitSPUpdate()
306                    StackPtr, false, 0);  in emitSPUpdate()
369                               StackPtr),  in BuildStackAdjustment()
370                       StackPtr, false, Offset);  in BuildStackAdjustment()
376     MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)  in BuildStackAdjustment()
377              .addReg(StackPtr)  in BuildStackAdjustment()
412       PI->getOperand(0).getReg() == StackPtr) {  in mergeSPUpdates()
413     assert(PI->getOperand(1).getReg() == StackPtr);  in mergeSPUpdates()
416              PI->getOperand(0).getReg() == StackPtr &&  in mergeSPUpdates()
417              PI->getOperand(1).getReg() == StackPtr &&  in mergeSPUpdates()
424              PI->getOperand(0).getReg() == StackPtr) {  in mergeSPUpdates()
425     assert(PI->getOperand(1).getReg() == StackPtr);  in mergeSPUpdates()
707                  StackPtr, false, 0)  in emitStackProbeInlineGenericBlock()
728                  StackPtr, false, 0)  in emitStackProbeInlineGenericBlock()
778                    StackPtr, false, 0)  in emitStackProbeInlineGenericLoop()
802       .addReg(StackPtr)  in emitStackProbeInlineGenericLoop()
840                StackPtr, false, 0)  in emitStackProbeInlineGenericLoop()
846       .addReg(StackPtr)  in emitStackProbeInlineGenericLoop()
878             ? Register(getX86SubSuperRegister(StackPtr, 64))  in emitStackProbeInlineGenericLoop()
879             : Register(StackPtr);  in emitStackProbeInlineGenericLoop()
1260   if (Reg == StackPtr && EmitInlineStackProbe && MaxAlign >= StackProbeSize) {  in BuildStackAlignAND()
1287             .addReg(StackPtr)  in BuildStackAlignAND()
1301             .addReg(StackPtr)  in BuildStackAlignAND()
1315         BuildMI(headMBB, DL, TII.get(SUBOpc), StackPtr)  in BuildStackAlignAND()
1316             .addReg(StackPtr)  in BuildStackAlignAND()
1322             .addReg(StackPtr)  in BuildStackAlignAND()
1340                      StackPtr, false, 0)  in BuildStackAlignAND()
1345         BuildMI(bodyMBB, DL, TII.get(SUBOpc), StackPtr)  in BuildStackAlignAND()
1346             .addReg(StackPtr)  in BuildStackAlignAND()
1354             .addReg(StackPtr)  in BuildStackAlignAND()
1368         BuildMI(footMBB, DL, TII.get(TargetOpcode::COPY), StackPtr)  in BuildStackAlignAND()
1373                      StackPtr, false, 0)  in BuildStackAlignAND()
1574         .addUse(StackPtr)  in emitPrologue()
1587     BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign);  in emitPrologue()
1721     addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MOVmr)), StackPtr, true, 16)  in emitPrologue()
1820               .addReg(StackPtr)  in emitPrologue()
1930     BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign);  in emitPrologue()
2002                           StackPtr, false, NumBytes - 8);  in emitPrologue()
2005                           StackPtr, false, NumBytes - 4);  in emitPrologue()
2038       addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr,  in emitPrologue()
2048     SPOrEstablisher = StackPtr;  in emitPrologue()
2130     addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, false,  in emitPrologue()
2132         .addReg(StackPtr)  in emitPrologue()
2524       addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr), FramePtr,  in emitEpilogue()
2529       BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr).addReg(FramePtr);  in emitEpilogue()
3963   return StackPtr;  in getInitialCFARegister()