4899   MVT EltVT = SrcVT.getVectorElementType();  in PromoteSplat()  local
4900   if (EltVT == MVT::i8 || EltVT == MVT::i16)  in PromoteSplat()
5400   EVT EltVT = VT.getVectorElementType();  in EltsFromConsecutiveLoads()  local
5426     if (!DAG.isConsecutiveLoad(LD, LDBase, EltVT.getSizeInBits()/8, i))  in EltsFromConsecutiveLoads()
6179   MVT EltVT = VT.getVectorElementType();  in LowerVECTOR_SHUFFLEtoBlend()  local
6186   if (!Subtarget->hasSSE41() || EltVT == MVT::i8)  in LowerVECTOR_SHUFFLEtoBlend()
6219   if (EltVT == MVT::i64 || (EltVT == MVT::i32 && !Subtarget->hasInt256())) {  in LowerVECTOR_SHUFFLEtoBlend()
6220     BlendVT = MVT::getVectorVT(MVT::getFloatingPointVT(EltVT.getSizeInBits()),  in LowerVECTOR_SHUFFLEtoBlend()
6756   MVT EltVT = VT.getVectorElementType();  in LowerVECTOR_SHUFFLE_256()  local
6757   MVT NVT = MVT::getVectorVT(EltVT, NumLaneElems);  in LowerVECTOR_SHUFFLE_256()
6814           SVOps.push_back(DAG.getUNDEF(EltVT));  in LowerVECTOR_SHUFFLE_256()
6825         SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,  in LowerVECTOR_SHUFFLE_256()
7361     MVT EltVT = VT.getVectorElementType();  in LowerVECTOR_SHUFFLE()  local
7362     ShAmt *= EltVT.getSizeInBits();  in LowerVECTOR_SHUFFLE()
7400     MVT EltVT = VT.getVectorElementType();  in LowerVECTOR_SHUFFLE()  local
7401     ShAmt *= EltVT.getSizeInBits();  in LowerVECTOR_SHUFFLE()
7679     MVT EltVT = VecVT.getVectorElementType();  in LowerEXTRACT_VECTOR_ELT()  local
7681     unsigned ElemsPerChunk = 128 / EltVT.getSizeInBits();  in LowerEXTRACT_VECTOR_ELT()
7710     MVT EltVT = MVT::i32;  in LowerEXTRACT_VECTOR_ELT()  local
7711     SDValue Extract = DAG.getNode(X86ISD::PEXTRW, dl, EltVT,  in LowerEXTRACT_VECTOR_ELT()
7713     SDValue Assert  = DAG.getNode(ISD::AssertZext, dl, EltVT, Extract,  in LowerEXTRACT_VECTOR_ELT()
7756   MVT EltVT = VT.getVectorElementType();  in LowerINSERT_VECTOR_ELT_SSE4()  local
7766   if ((EltVT.getSizeInBits() == 8 || EltVT.getSizeInBits() == 16) &&  in LowerINSERT_VECTOR_ELT_SSE4()
7785   if (EltVT == MVT::f32 && isa<ConstantSDNode>(N2)) {  in LowerINSERT_VECTOR_ELT_SSE4()
7800   if ((EltVT == MVT::i32 || EltVT == MVT::i64) && isa<ConstantSDNode>(N2)) {  in LowerINSERT_VECTOR_ELT_SSE4()
7810   MVT EltVT = VT.getVectorElementType();  in LowerINSERT_VECTOR_ELT()  local
7828     unsigned NumEltsIn128 = 128/EltVT.getSizeInBits();  in LowerINSERT_VECTOR_ELT()
7841   if (EltVT == MVT::i8)  in LowerINSERT_VECTOR_ELT()
7844   if (EltVT.getSizeInBits() == 16 && isa<ConstantSDNode>(N2)) {  in LowerINSERT_VECTOR_ELT()
9193   MVT EltVT = VT;  in LowerFABS()  local
9196     EltVT = VT.getVectorElementType();  in LowerFABS()
9200   if (EltVT == MVT::f64)  in LowerFABS()
9227   MVT EltVT = VT;  in LowerFNEG()  local
9230     EltVT = VT.getVectorElementType();  in LowerFNEG()
9234   if (EltVT == MVT::f64)  in LowerFNEG()
9840   MVT EltVT = VT.getVectorElementType();  in Lower256IntVSETCC()  local
9841   MVT NewVT = MVT::getVectorVT(EltVT, NumElems/2);  in Lower256IntVSETCC()
9893     MVT EltVT = Op0.getSimpleValueType().getVectorElementType();  in LowerVSETCC()  local
9894     assert(EltVT == MVT::f32 || EltVT == MVT::f64);  in LowerVSETCC()
10061     EVT EltVT = VT.getVectorElementType();  in LowerVSETCC()  local
10062     SDValue SB = DAG.getConstant(APInt::getSignBit(EltVT.getSizeInBits()), VT);  in LowerVSETCC()
11030   MVT EltVT = VT.getVectorElementType().getSimpleVT();  in getTargetVShiftNode()  local
11031   EVT ShVT = MVT::getVectorVT(EltVT, 128/EltVT.getSizeInBits());  in getTargetVShiftNode()
12424   MVT EltVT = VT.getVectorElementType().getSimpleVT();  in Lower256IntArith()  local
12425   EVT NewVT = MVT::getVectorVT(EltVT, NumElems/2);  in Lower256IntArith()
12759     EVT EltVT = VT.getVectorElementType();  in LowerScalarVariableShift()  local
12802           BaseShAmt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Amt,  in LowerScalarVariableShift()
12808       if (EltVT.bitsGT(MVT::i32))  in LowerScalarVariableShift()
12810       else if (EltVT.bitsLT(MVT::i32))  in LowerScalarVariableShift()
12980     MVT EltVT = VT.getVectorElementType().getSimpleVT();  in LowerShift()  local
12981     EVT NewVT = MVT::getVectorVT(EltVT, NumElems/2);  in LowerShift()
13121         MVT EltVT = VT.getVectorElementType().getSimpleVT();  in LowerSIGN_EXTEND_INREG()  local
13122         EVT NewVT = MVT::getVectorVT(EltVT, NumElems/2);  in LowerSIGN_EXTEND_INREG()
16393   MVT EltVT = N->getSimpleValueType(0);  in ExtractBitFromMaskVector()  local
16395   assert((VecVT.getVectorElementType() == MVT::i1 && EltVT == MVT::i8) ||  in ExtractBitFromMaskVector()
16404     return DAG.getNode(ISD::TRUNCATE, dl, EltVT, Elt);  in ExtractBitFromMaskVector()