Lines Matching refs:t4_read_reg
1296 j = t4_read_reg(sc, A_PL_WHOAMI); in t4_attach()
1983 val = t4_read_reg(sc, A_PL_WHOAMI); in restart_adapter()
4007 t4_read_reg(sc, PCIE_MEM_ACCESS_REG(A_PCIE_MEM_ACCESS_BASE_WIN, 2)); in setup_memwin()
4036 t4_read_reg(sc, reg); /* flush */ in position_memwin()
4070 v = t4_read_reg(sc, mw->mw_base + addr - in rw_via_memwin()
4244 em = t4_read_reg(sc, A_MA_TARGET_MEM_ENABLE); in validate_mem_range()
4250 addr_len = t4_read_reg(sc, A_MA_EDRAM0_BAR); in validate_mem_range()
4262 addr_len = t4_read_reg(sc, A_MA_EDRAM1_BAR); in validate_mem_range()
4274 addr_len = t4_read_reg(sc, A_MA_EXT_MEMORY_BAR); in validate_mem_range()
4286 addr_len = t4_read_reg(sc, A_MA_EXT_MEMORY1_BAR); in validate_mem_range()
4388 em = t4_read_reg(sc, A_MA_TARGET_MEM_ENABLE); in validate_mt_off_len()
4393 addr_len = t4_read_reg(sc, A_MA_EDRAM0_BAR); in validate_mt_off_len()
4399 addr_len = t4_read_reg(sc, A_MA_EDRAM1_BAR); in validate_mt_off_len()
4405 addr_len = t4_read_reg(sc, A_MA_EXT_MEMORY_BAR); in validate_mt_off_len()
4411 addr_len = t4_read_reg(sc, A_MA_EXT_MEMORY1_BAR); in validate_mt_off_len()
4997 "PCIE_FW 0x%08x\n", rc, state, t4_read_reg(sc, A_PCIE_FW)); in contact_firmware()
5024 "PCIE_FW 0x%08x\n", rc, state, t4_read_reg(sc, A_PCIE_FW)); in contact_firmware()
5033 "PCIE_FW 0x%08x\n", rc, state, t4_read_reg(sc, A_PCIE_FW)); in contact_firmware()
5487 sc->tids.tid_base = t4_read_reg(sc, in get_params__post_init()
5865 val = 1 << (G_MASKSIZE(t4_read_reg(sc, A_TP_RSS_CONFIG_TNL)) - 1); in set_params__post_init()
7363 stats[0] = t4_read_reg(sc, VF_MPS_REG(reg)); in read_vf_stat()
7364 stats[1] = t4_read_reg(sc, VF_MPS_REG(reg + 4)); in read_vf_stat()
7369 stats[0] = t4_read_reg(sc, A_PL_INDIR_DATA); in read_vf_stat()
7370 stats[1] = t4_read_reg(sc, A_PL_INDIR_DATA); in read_vf_stat()
9287 t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA0), in dump_cim_regs()
9288 t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA1), in dump_cim_regs()
9289 t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA2), in dump_cim_regs()
9290 t4_read_reg(sc, A_EDC_H_BIST_DATA_PATTERN), in dump_cim_regs()
9291 t4_read_reg(sc, A_EDC_H_BIST_STATUS_RDATA)); in dump_cim_regs()
9294 t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA0), in dump_cim_regs()
9295 t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA1), in dump_cim_regs()
9296 t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA0 + 0x800), in dump_cim_regs()
9297 t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA1 + 0x800), in dump_cim_regs()
9298 t4_read_reg(sc, A_EDC_H_BIST_CMD_LEN)); in dump_cim_regs()
9815 map = t4_read_reg(sc, A_TP_TX_MOD_QUEUE_REQ_MAP); in sysctl_hw_sched()
9816 mode = G_TIMERMODE(t4_read_reg(sc, A_TP_MOD_CONFIG)); in sysctl_hw_sched()
10006 lo = t4_read_reg(sc, A_MA_TARGET_MEM_ENABLE); in sysctl_meminfo()
10008 hi = t4_read_reg(sc, A_MA_EDRAM0_BAR); in sysctl_meminfo()
10015 hi = t4_read_reg(sc, A_MA_EDRAM1_BAR); in sysctl_meminfo()
10022 hi = t4_read_reg(sc, A_MA_EXT_MEMORY_BAR); in sysctl_meminfo()
10029 hi = t4_read_reg(sc, A_MA_EXT_MEMORY1_BAR); in sysctl_meminfo()
10036 hi = t4_read_reg(sc, A_MA_EXT_MEMORY1_BAR); in sysctl_meminfo()
10047 (md++)->base = t4_read_reg(sc, A_SGE_DBQ_CTXT_BADDR); in sysctl_meminfo()
10048 (md++)->base = t4_read_reg(sc, A_SGE_IMSG_CTXT_BADDR); in sysctl_meminfo()
10049 (md++)->base = t4_read_reg(sc, A_SGE_FLM_CACHE_BADDR); in sysctl_meminfo()
10050 (md++)->base = t4_read_reg(sc, A_TP_CMM_TCB_BASE); in sysctl_meminfo()
10051 (md++)->base = t4_read_reg(sc, A_TP_CMM_MM_BASE); in sysctl_meminfo()
10052 (md++)->base = t4_read_reg(sc, A_TP_CMM_TIMER_BASE); in sysctl_meminfo()
10053 (md++)->base = t4_read_reg(sc, A_TP_CMM_MM_RX_FLST_BASE); in sysctl_meminfo()
10054 (md++)->base = t4_read_reg(sc, A_TP_CMM_MM_TX_FLST_BASE); in sysctl_meminfo()
10055 (md++)->base = t4_read_reg(sc, A_TP_CMM_MM_PS_FLST_BASE); in sysctl_meminfo()
10058 md->base = t4_read_reg(sc, A_TP_PMM_TX_BASE); in sysctl_meminfo()
10060 t4_read_reg(sc, A_TP_PMM_TX_PAGE_SIZE) * in sysctl_meminfo()
10061 G_PMTXMAXPAGE(t4_read_reg(sc, A_TP_PMM_TX_MAX_PAGE)); in sysctl_meminfo()
10064 md->base = t4_read_reg(sc, A_TP_PMM_RX_BASE); in sysctl_meminfo()
10066 t4_read_reg(sc, A_TP_PMM_RX_PAGE_SIZE) * in sysctl_meminfo()
10067 G_PMRXMAXPAGE(t4_read_reg(sc, A_TP_PMM_RX_MAX_PAGE)); in sysctl_meminfo()
10070 if (t4_read_reg(sc, A_LE_DB_CONFIG) & F_HASHEN) { in sysctl_meminfo()
10072 md->base = t4_read_reg(sc, A_LE_DB_HASH_TID_BASE); in sysctl_meminfo()
10074 md->base = t4_read_reg(sc, A_LE_DB_HASH_TBL_BASE_ADDR); in sysctl_meminfo()
10083 md->base = t4_read_reg(sc, A_ULP_ ## reg ## _LLIMIT);\ in sysctl_meminfo()
10084 (md++)->limit = t4_read_reg(sc, A_ULP_ ## reg ## _ULIMIT) in sysctl_meminfo()
10104 uint32_t sge_ctrl = t4_read_reg(sc, A_SGE_CONTROL2); in sysctl_meminfo()
10105 uint32_t fifo_size = t4_read_reg(sc, A_SGE_DBVFIFO_SIZE); in sysctl_meminfo()
10114 md->base = t4_read_reg(sc, A_SGE_DBVFIFO_BADDR); in sysctl_meminfo()
10121 md->base = t4_read_reg(sc, A_ULP_RX_CTX_BASE); in sysctl_meminfo()
10124 md->base = t4_read_reg(sc, A_ULP_TX_ERR_TABLE_BASE); in sysctl_meminfo()
10161 lo = t4_read_reg(sc, A_CIM_SDRAM_BASE_ADDR); in sysctl_meminfo()
10162 hi = t4_read_reg(sc, A_CIM_SDRAM_ADDR_SIZE) + lo - 1; in sysctl_meminfo()
10165 lo = t4_read_reg(sc, A_CIM_EXTMEM2_BASE_ADDR); in sysctl_meminfo()
10166 hi = t4_read_reg(sc, A_CIM_EXTMEM2_ADDR_SIZE) + lo - 1; in sysctl_meminfo()
10169 lo = t4_read_reg(sc, A_TP_PMM_RX_MAX_PAGE); in sysctl_meminfo()
10171 free += G_FREERXPAGECOUNT(t4_read_reg(sc, A_TP_FLM_FREE_RX_CNT)); in sysctl_meminfo()
10174 t4_read_reg(sc, A_TP_PMM_RX_PAGE_SIZE) >> 10, in sysctl_meminfo()
10177 lo = t4_read_reg(sc, A_TP_PMM_TX_MAX_PAGE); in sysctl_meminfo()
10178 hi = t4_read_reg(sc, A_TP_PMM_TX_PAGE_SIZE); in sysctl_meminfo()
10180 free += G_FREETXPAGECOUNT(t4_read_reg(sc, A_TP_FLM_FREE_TX_CNT)); in sysctl_meminfo()
10186 t4_read_reg(sc, A_TP_CMM_MM_MAX_PSTRUCT), in sysctl_meminfo()
10187 G_FREEPSTRUCTCOUNT(t4_read_reg(sc, A_TP_FLM_FREE_PS_CNT))); in sysctl_meminfo()
10191 lo = t4_read_reg(sc, A_MPS_RX_MAC_BG_PG_CNT0 + i * 4); in sysctl_meminfo()
10193 lo = t4_read_reg(sc, A_MPS_RX_PG_RSV0 + i * 4); in sysctl_meminfo()
10207 lo = t4_read_reg(sc, A_MPS_RX_LPBK_BG_PG_CNT0 + i * 4); in sysctl_meminfo()
10209 lo = t4_read_reg(sc, A_MPS_RX_PG_RSV4 + i * 4); in sysctl_meminfo()
10277 cls_lo = t4_read_reg(sc, MPS_CLS_SRAM_L(i)); in sysctl_mps_tcam()
10278 cls_hi = t4_read_reg(sc, MPS_CLS_SRAM_H(i)); in sysctl_mps_tcam()
10375 val = t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA1_REQ_ID1); in sysctl_mps_tcam_t6()
10377 tcamy |= t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA0_REQ_ID1); in sysctl_mps_tcam_t6()
10378 data2 = t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA2_REQ_ID1); in sysctl_mps_tcam_t6()
10405 val = t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA1_REQ_ID1); in sysctl_mps_tcam_t6()
10407 tcamx |= t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA0_REQ_ID1); in sysctl_mps_tcam_t6()
10408 data2 = t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA2_REQ_ID1); in sysctl_mps_tcam_t6()
10429 cls_lo = t4_read_reg(sc, MPS_CLS_SRAM_L(i)); in sysctl_mps_tcam_t6()
10430 cls_hi = t4_read_reg(sc, MPS_CLS_SRAM_H(i)); in sysctl_mps_tcam_t6()
10722 else if (t4_read_reg(sc, A_LE_DB_CONFIG) & F_HASHEN) { in sysctl_tids()
10725 x = t4_read_reg(sc, A_LE_DB_SERVER_INDEX) / 4; in sysctl_tids()
10726 y = t4_read_reg(sc, A_LE_DB_TID_HASHBASE) / 4; in sysctl_tids()
10728 x = t4_read_reg(sc, A_LE_DB_SRVR_START_INDEX); in sysctl_tids()
10729 y = t4_read_reg(sc, A_T6_LE_DB_HASH_TID_BASE); in sysctl_tids()
10768 x = t4_read_reg(sc, A_LE_DB_ACT_CNT_IPV4); in sysctl_tids()
10769 y = t4_read_reg(sc, A_LE_DB_ACT_CNT_IPV6); in sysctl_tids()
11147 switch (G_DBGLAMODE(t4_read_reg(sc, A_TP_DBG_LA_CONFIG))) { in sysctl_tp_la()
11272 cfg = t4_read_reg(sc, A_SGE_STAT_CFG); in sysctl_wcwr_stats()
11273 s1 = t4_read_reg(sc, A_SGE_STAT_TOTAL); in sysctl_wcwr_stats()
11274 s2 = t4_read_reg(sc, A_SGE_STAT_MATCH); in sysctl_wcwr_stats()
11419 res = t4_read_reg(sc, A_TP_TIMER_RESOLUTION); in sysctl_tp_tick()
11459 dack_re = G_DELAYEDACKRESOLUTION(t4_read_reg(sc, in sysctl_tp_dack_timer()
11461 dack_tmr = t4_read_reg(sc, A_TP_DACK_TIMER); in sysctl_tp_dack_timer()
11491 tre = G_TIMERRESOLUTION(t4_read_reg(sc, A_TP_TIMER_RESOLUTION)); in sysctl_tp_timer()
11494 v = tp_tick_us * G_INITSRTT(t4_read_reg(sc, reg)); in sysctl_tp_timer()
11496 v = tp_tick_us * t4_read_reg(sc, reg); in sysctl_tp_timer()
11523 v = (t4_read_reg(sc, A_TP_SHIFT_CNT) >> idx) & 0xf; in sysctl_tp_shift_cnt()
11548 v = (t4_read_reg(sc, r) >> shift) & M_TIMERBACKOFFINDEX0; in sysctl_tp_backoff()
11749 offset = G_OFFSET(t4_read_reg(sc, PF_REG(br->pfidx_addr, in load_boot()
12350 edata->val = t4_read_reg(sc, edata->addr); in t4_ioctl()
12916 save = t4_read_reg(sc, reg); in t4_dump_mem()
12928 t4_read_reg(sc, reg); in t4_dump_mem()
12933 buf[j] = htonl(t4_read_reg(sc, base + off)); in t4_dump_mem()
12945 t4_read_reg(sc, reg); in t4_dump_mem()
12954 tcb_addr = t4_read_reg(sc, A_TP_CMM_TCB_BASE); in t4_dump_tcb()