67     {{ ATA_IT8213F, 0x00, 0x00, 0x00, ATA_UDMA6, "IT8213F" },  in ata_ite_probe()
68      { ATA_IT8212F, 0x00, 0x00, 0x00, ATA_UDMA6, "IT8212F" },  in ata_ite_probe()
69      { ATA_IT8211F, 0x00, 0x00, 0x00, ATA_UDMA6, "IT8211F" },  in ata_ite_probe()
70      { 0, 0, 0, 0, 0, 0}};  in ata_ite_probe()
99 	pci_write_config(dev, 0x50, pci_read_config(dev, 0x50, 1) & ~0x83, 1);  in ata_ite_chipinit()
102 	pci_write_config(dev, 0x54, 0x31, 1);  in ata_ite_chipinit()
103 	pci_write_config(dev, 0x56, 0x31, 1);  in ata_ite_chipinit()
110     return (0);  in ata_ite_chipinit()
135 		{ 0x44, 0x42, 0x31, 0x21, 0x11, 0xa2, 0x91 };  in ata_ite_821x_setmode()
137 		{ 0xaa, 0xa3, 0xa1, 0x33, 0x31, 0x88, 0x32, 0x31 };  in ata_ite_821x_setmode()
142 	    (pci_read_config(parent, 0x40, 2) &  in ata_ite_821x_setmode()
149 		pci_write_config(parent, 0x50,  in ata_ite_821x_setmode()
150 			     pci_read_config(parent, 0x50, 1) &  in ata_ite_821x_setmode()
154 			     0x56 + (ch->unit << 2) + target,  in ata_ite_821x_setmode()
159 		pci_write_config(parent, 0x50,  in ata_ite_821x_setmode()
160 			     pci_read_config(parent, 0x50, 1) |  in ata_ite_821x_setmode()
166 	pci_write_config(parent, 0x54 + (ch->unit << 2),  in ata_ite_821x_setmode()
177 	u_int16_t reg40 = pci_read_config(parent, 0x40, 2);  in ata_ite_8213_setmode()
178 	u_int8_t reg44 = pci_read_config(parent, 0x44, 1);  in ata_ite_8213_setmode()
179 	u_int8_t reg48 = pci_read_config(parent, 0x48, 1);  in ata_ite_8213_setmode()
180 	u_int16_t reg4a = pci_read_config(parent, 0x4a, 2);  in ata_ite_8213_setmode()
181 	u_int16_t reg54 = pci_read_config(parent, 0x54, 2);  in ata_ite_8213_setmode()
182 	u_int16_t mask40 = 0, new40 = 0;  in ata_ite_8213_setmode()
183 	u_int8_t mask44 = 0, new44 = 0;  in ata_ite_8213_setmode()
185 	    { 0x00, 0x00, 0x10, 0x21, 0x23, 0x00, 0x21, 0x23 };  in ata_ite_8213_setmode()
187 	    { 0x00, 0x01, 0x02, 0x01, 0x02, 0x01, 0x02 };  in ata_ite_8213_setmode()
192 	    !(reg54 & (0x10 << target))) {  in ata_ite_8213_setmode()
198 	    pci_write_config(parent, 0x48, reg48 | (0x0001 << target), 2);  in ata_ite_8213_setmode()
199 	    pci_write_config(parent, 0x4a,  in ata_ite_8213_setmode()
200 			     (reg4a & ~(0x3 << (target << 2))) |  in ata_ite_8213_setmode()
204 	    pci_write_config(parent, 0x48, reg48 & ~(0x0001 << target), 2);  in ata_ite_8213_setmode()
205 	    pci_write_config(parent, 0x4a, (reg4a & ~(0x3 << (target << 2))),2);  in ata_ite_8213_setmode()
209 	reg54 &= ~(0x1001 << target);  in ata_ite_8213_setmode()
211 	    reg54 |= (0x1000 << target);  in ata_ite_8213_setmode()
213 	    reg54 |= (0x1 << target);  in ata_ite_8213_setmode()
214 	pci_write_config(parent, 0x54, reg54, 2);  in ata_ite_8213_setmode()
216 	reg40 &= 0xff00;  in ata_ite_8213_setmode()
217 	reg40 |= 0x4033;  in ata_ite_8213_setmode()
219 	if (target == 0) {  in ata_ite_8213_setmode()
220 	    reg40 |= (ata_atapi(dev, target) ? 0x04 : 0x00);  in ata_ite_8213_setmode()
221 	    mask40 = 0x3300;  in ata_ite_8213_setmode()
225 	    reg40 |= (ata_atapi(dev, target) ? 0x40 : 0x00);  in ata_ite_8213_setmode()
226 	    mask44 = 0x0f;  in ata_ite_8213_setmode()
227 	    new44 = ((timings[ata_mode2idx(piomode)] & 0x30) >> 2) |  in ata_ite_8213_setmode()
228 		    (timings[ata_mode2idx(piomode)] & 0x03);  in ata_ite_8213_setmode()
230 	pci_write_config(parent, 0x40, (reg40 & ~mask40) | new40, 4);  in ata_ite_8213_setmode()
231 	pci_write_config(parent, 0x44, (reg44 & ~mask44) | new44, 1);  in ata_ite_8213_setmode()