Lines Matching full:value
260 u32 value; in read_sge_debug_data() local
265 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_LOW); in read_sge_debug_data()
266 /*printf("LOW 0x%08x\n", value);*/ in read_sge_debug_data()
267 sge_dbg_reg[(i << 1) | 1] = HTONL_NIBBLE(value); in read_sge_debug_data()
268 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH); in read_sge_debug_data()
269 /*printf("HIGH 0x%08x\n", value);*/ in read_sge_debug_data()
270 sge_dbg_reg[(i << 1)] = HTONL_NIBBLE(value); in read_sge_debug_data()
282 t4_tp_mib_read(padap, &tp_mib[i].value, 1, in read_tp_mib_data()
300 u32 value = 0; in t5_wtp_data() local
333 value = t4_read_reg(padap, A_PCIE_CMDR_REQ_CNT); in t5_wtp_data()
335 wtp->pcie_core_cmd_req.sop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
336 wtp->pcie_core_cmd_req.sop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
338 wtp->pcie_core_cmd_req.eop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
339 wtp->pcie_core_cmd_req.eop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
343 value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT3 + (i * 0x10)); in t5_wtp_data()
344 wtp->pcie_t5_dma_stat3.sop[i] = value & 0xFF; in t5_wtp_data()
345 wtp->pcie_t5_dma_stat3.eop[i] = ((value >> 16) & 0xFF); in t5_wtp_data()
349 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_6); in t5_wtp_data()
350 wtp->sge_debug_data_high_index_6.sop[0] = ((value >> 4) & 0x0F); in t5_wtp_data()
351 wtp->sge_debug_data_high_index_6.eop[0] = ((value >> 0) & 0x0F); in t5_wtp_data()
352 wtp->sge_debug_data_high_index_6.sop[1] = ((value >> 12) & 0x0F); in t5_wtp_data()
353 wtp->sge_debug_data_high_index_6.eop[1] = ((value >> 8) & 0x0F); in t5_wtp_data()
354 wtp->sge_debug_data_high_index_6.sop[2] = ((value >> 20) & 0x0F); in t5_wtp_data()
355 wtp->sge_debug_data_high_index_6.eop[2] = ((value >> 16) & 0x0F); in t5_wtp_data()
356 wtp->sge_debug_data_high_index_6.sop[3] = ((value >> 28) & 0x0F); in t5_wtp_data()
357 wtp->sge_debug_data_high_index_6.eop[3] = ((value >> 24) & 0x0F); in t5_wtp_data()
360 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_3); in t5_wtp_data()
361 wtp->sge_debug_data_high_index_3.sop[0] = ((value >> 4) & 0x0F); in t5_wtp_data()
362 wtp->sge_debug_data_high_index_3.eop[0] = ((value >> 0) & 0x0F); in t5_wtp_data()
363 wtp->sge_debug_data_high_index_3.sop[1] = ((value >> 12) & 0x0F); in t5_wtp_data()
364 wtp->sge_debug_data_high_index_3.eop[1] = ((value >> 8) & 0x0F); in t5_wtp_data()
365 wtp->sge_debug_data_high_index_3.sop[2] = ((value >> 20) & 0x0F); in t5_wtp_data()
366 wtp->sge_debug_data_high_index_3.eop[2] = ((value >> 16) & 0x0F); in t5_wtp_data()
367 wtp->sge_debug_data_high_index_3.sop[3] = ((value >> 28) & 0x0F); in t5_wtp_data()
368 wtp->sge_debug_data_high_index_3.eop[3] = ((value >> 24) & 0x0F); in t5_wtp_data()
372 value = t4_read_reg(padap, A_ULP_TX_SE_CNT_CH0 + (i * 4)); in t5_wtp_data()
373 wtp->ulp_se_cnt_chx.sop[i] = ((value >> 28) & 0x0F); in t5_wtp_data()
374 wtp->ulp_se_cnt_chx.eop[i] = ((value >> 24) & 0x0F); in t5_wtp_data()
379 value = t4_read_reg(padap, 0x3081c + ((i * 4) << 12)); in t5_wtp_data()
380 wtp->mac_portx_pkt_count.sop[i] = ((value >> 24) & 0xFF); in t5_wtp_data()
381 wtp->mac_portx_pkt_count.eop[i] = ((value >> 16) & 0xFF); in t5_wtp_data()
382 wtp->mac_porrx_pkt_count.sop[i] = ((value >> 8) & 0xFF); in t5_wtp_data()
383 wtp->mac_porrx_pkt_count.eop[i] = ((value >> 0) & 0xFF); in t5_wtp_data()
388 value = t4_read_reg(padap, 0x30a80 + ((i * 4) << 12)); in t5_wtp_data()
389 wtp->mac_portx_aframestra_ok.sop[i] = (value & 0xFF); in t5_wtp_data()
390 wtp->mac_portx_aframestra_ok.eop[i] = (value & 0xFF); in t5_wtp_data()
394 value = t4_read_reg(padap, A_PCIE_CMDR_RSP_CNT); in t5_wtp_data()
396 wtp->core_pcie_cmd_rsp.sop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
397 wtp->core_pcie_cmd_rsp.sop[1] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
399 wtp->core_pcie_cmd_rsp.eop[0] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
400 wtp->core_pcie_cmd_rsp.eop[1] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
439 value = t4_read_reg(padap, A_PCIE_DMAR_REQ_CNT); in t5_wtp_data()
441 wtp->pcie_core_dma_req.sop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
442 wtp->pcie_core_dma_req.sop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
443 wtp->pcie_core_dma_req.sop[2] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
444 wtp->pcie_core_dma_req.sop[3] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
446 wtp->pcie_core_dma_req.eop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
447 wtp->pcie_core_dma_req.eop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
448 wtp->pcie_core_dma_req.eop[2] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
449 wtp->pcie_core_dma_req.eop[3] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
452 value = t4_read_reg(padap, A_PCIE_DMAR_RSP_SOP_CNT); in t5_wtp_data()
454 wtp->core_pcie_dma_rsp.sop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
455 wtp->core_pcie_dma_rsp.sop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
456 wtp->core_pcie_dma_rsp.sop[2] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
457 wtp->core_pcie_dma_rsp.sop[3] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
459 value = t4_read_reg(padap, A_PCIE_DMAR_RSP_EOP_CNT); in t5_wtp_data()
461 wtp->core_pcie_dma_rsp.eop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
462 wtp->core_pcie_dma_rsp.eop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
463 wtp->core_pcie_dma_rsp.eop[2] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
464 wtp->core_pcie_dma_rsp.eop[3] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
490 value = t4_read_reg(padap, (A_ULP_TX_SE_CNT_CH0 + (i*4))); in t5_wtp_data()
492 wtp->utx_tp.sop[i] = ((value >> 28) & 0xF); /*bits 28:31*/ in t5_wtp_data()
493 wtp->utx_tp.eop[i] = ((value >> 24) & 0xF); /*bits 24:27*/ in t5_wtp_data()
498 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_RX0 + i), in t5_wtp_data()
501 wtp->utx_tpcside.sop[i] = ((value >> 28) & 0xF);/*bits 28:31*/ in t5_wtp_data()
502 wtp->utx_tpcside.eop[i] = ((value >> 24) & 0xF);/*bits 24:27*/ in t5_wtp_data()
503 wtp->tpcside_rxpld.sop[i] = ((value >> 20) & 0xF);/*bits 20:23*/ in t5_wtp_data()
504 wtp->tpcside_rxpld.eop[i] = ((value >> 16) & 0xF);/*bits 16:19*/ in t5_wtp_data()
505 wtp->tpcside_rxarb.sop[i] = ((value >> 12) & 0xF);/*bits 12:15*/ in t5_wtp_data()
506 wtp->tpcside_rxarb.eop[i] = ((value >> 8) & 0xF); /*bits 8:11*/ in t5_wtp_data()
507 wtp->tpcside_rxcpl.sop[i] = ((value >> 4) & 0xF); /*bits 4:7*/ in t5_wtp_data()
508 wtp->tpcside_rxcpl.eop[i] = ((value >> 0) & 0xF); /*bits 0:3*/ in t5_wtp_data()
513 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i), in t5_wtp_data()
516 wtp->tpeside_mps.sop[i] = ((value >> 28) & 0xF); /*bits 28:31*/ in t5_wtp_data()
517 wtp->tpeside_mps.eop[i] = ((value >> 24) & 0xF); /*bits 24:27*/ in t5_wtp_data()
518 wtp->tpeside_pm.sop[i] = ((value >> 20) & 0xF); /*bits 20:23*/ in t5_wtp_data()
519 wtp->tpeside_pm.eop[i] = ((value >> 16) & 0xF); /*bits 16:19*/ in t5_wtp_data()
520 wtp->mps_tpeside.sop[i] = ((value >> 12) & 0xF); /*bits 12:15*/ in t5_wtp_data()
521 wtp->mps_tpeside.eop[i] = ((value >> 8) & 0xF); /*bits 8:11*/ in t5_wtp_data()
522 wtp->tpeside_pld.sop[i] = ((value >> 4) & 0xF); /*bits 4:7*/ in t5_wtp_data()
523 wtp->tpeside_pld.eop[i] = ((value >> 0) & 0xF); /*bits 0:3*/ in t5_wtp_data()
529 value = t4_read_reg(padap, 0x5988 + (i * 0x10)); in t5_wtp_data()
530 wtp->pcie_cmd_stat2.sop[i] = value & 0xFF; in t5_wtp_data()
531 wtp->pcie_cmd_stat2.eop[i] = value & 0xFF; in t5_wtp_data()
536 value = t4_read_reg(padap, 0x598c + (i * 0x10)); in t5_wtp_data()
537 wtp->pcie_cmd_stat3.sop[i] = value & 0xFF; in t5_wtp_data()
538 wtp->pcie_cmd_stat3.eop[i] = value & 0xFF; in t5_wtp_data()
543 value = t4_read_reg(padap, (A_ULP_RX_SE_CNT_CH0 + (i*4))); in t5_wtp_data()
545 wtp->pmrx_ulprx.sop[i] = ((value >> 4) & 0xF); /*bits 4:7*/ in t5_wtp_data()
546 wtp->pmrx_ulprx.eop[i] = ((value >> 0) & 0xF); /*bits 0:3*/ in t5_wtp_data()
547 wtp->ulprx_tpcside.sop[i] = ((value >> 28) & 0xF);/*bits 28:31*/ in t5_wtp_data()
548 wtp->ulprx_tpcside.eop[i] = ((value >> 24) & 0xF);/*bits 24:27*/ in t5_wtp_data()
554 value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_TP01 + (i << 2))); in t5_wtp_data()
555 wtp->tp_mps.sop[(i*2)] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
556 wtp->tp_mps.eop[(i*2)] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
557 wtp->tp_mps.sop[(i*2) + 1] = ((value >> 24) & 0xFF);/*bit 24:31 in t5_wtp_data()
559 wtp->tp_mps.eop[(i*2) + 1] = ((value >> 16) & 0xFF);/*bit 16:23 in t5_wtp_data()
562 drop = ptp_mib->TP_MIB_OFD_ARP_DROP.value; in t5_wtp_data()
563 drop += ptp_mib->TP_MIB_OFD_DFR_DROP.value; in t5_wtp_data()
565 drop += ptp_mib->TP_MIB_TNL_DROP_0.value; in t5_wtp_data()
566 drop += ptp_mib->TP_MIB_TNL_DROP_1.value; in t5_wtp_data()
567 drop += ptp_mib->TP_MIB_TNL_DROP_2.value; in t5_wtp_data()
568 drop += ptp_mib->TP_MIB_TNL_DROP_3.value; in t5_wtp_data()
575 value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_MAC01 + (i << 2))); in t5_wtp_data()
576 wtp->mps_xgm.sop[(i*2)] = ((value >> 8) & 0xFF);/*bit 8:15*/ in t5_wtp_data()
577 wtp->mps_xgm.eop[(i*2)] = ((value >> 0) & 0xFF);/*bit 0:7*/ in t5_wtp_data()
578 wtp->mps_xgm.sop[(i*2) + 1] = ((value >> 24) & 0xFF);/*bit 24:31 in t5_wtp_data()
580 wtp->mps_xgm.eop[(i*2) + 1] = ((value >> 16) & 0xFF);/*bit 16:23 in t5_wtp_data()
584 value = t4_read_reg(padap, in t5_wtp_data()
587 drop += value; in t5_wtp_data()
597 value = t4_read_reg(padap, in t5_wtp_data()
601 wtp->tx_xgm_xgm.sop[i] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
602 wtp->tx_xgm_xgm.eop[i] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
603 wtp->rx_xgm_xgm.sop[i] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
604 wtp->rx_xgm_xgm.eop[i] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
610 value = t4_read_reg(padap, in t5_wtp_data()
613 wtp->xgm_wire.sop[i] = (value); in t5_wtp_data()
614 wtp->xgm_wire.eop[i] = (value); /* No EOP for XGMAC, so fake in t5_wtp_data()
625 value = t4_read_reg(padap, in t5_wtp_data()
629 wtp->wire_xgm.sop[i] = (value); in t5_wtp_data()
630 wtp->wire_xgm.eop[i] = (value); /* No EOP for XGMAC, so fake in t5_wtp_data()
639 value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_IN0 + (i << 2))); in t5_wtp_data()
641 wtp->xgm_mps.sop[i] = ((value >> 8) & 0xFF); /*bits 8:15*/ in t5_wtp_data()
642 wtp->xgm_mps.eop[i] = ((value >> 0) & 0xFF); /*bits 0:7*/ in t5_wtp_data()
645 value = t4_read_reg(padap, (A_MPS_RX_CLS_DROP_CNT0 + (i << 2))); in t5_wtp_data()
647 drop += (value & 0xFFFF) + ((value >> 16) & 0xFFFF); in t5_wtp_data()
654 value = t4_read_reg(padap, in t5_wtp_data()
657 drop += value; in t5_wtp_data()
658 value = t4_read_reg(padap, in t5_wtp_data()
661 value = t4_read_reg(padap, in t5_wtp_data()
664 drop += value; in t5_wtp_data()
665 value = t4_read_reg(padap, in t5_wtp_data()
669 value = t4_read_reg(padap, in t5_wtp_data()
672 drop += value; in t5_wtp_data()
673 value = t4_read_reg(padap, in t5_wtp_data()
676 value = t4_read_reg(padap, in t5_wtp_data()
679 drop += value; in t5_wtp_data()
680 value = t4_read_reg(padap, in t5_wtp_data()
684 value = t4_read_reg(padap, in t5_wtp_data()
687 drop += value; in t5_wtp_data()
695 value = t4_read_reg(padap, in t5_wtp_data()
698 err += value; in t5_wtp_data()
699 value = t4_read_reg(padap, in t5_wtp_data()
703 value = t4_read_reg(padap, in t5_wtp_data()
706 err += value; in t5_wtp_data()
707 value = t4_read_reg(padap, in t5_wtp_data()
711 value = t4_read_reg(padap, in t5_wtp_data()
714 err += value; in t5_wtp_data()
715 value = t4_read_reg(padap, in t5_wtp_data()
719 value = t4_read_reg(padap, in t5_wtp_data()
722 err += value; in t5_wtp_data()
723 value = t4_read_reg(padap, in t5_wtp_data()
727 value = t4_read_reg(padap, in t5_wtp_data()
730 err += value; in t5_wtp_data()
731 value = t4_read_reg(padap, in t5_wtp_data()
735 value = t4_read_reg(padap, in t5_wtp_data()
738 err += value; in t5_wtp_data()
739 value = t4_read_reg(padap, in t5_wtp_data()
747 value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_OUT01 + (i << 2))); in t5_wtp_data()
749 wtp->mps_tp.sop[(i*2)] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
750 wtp->mps_tp.eop[(i*2)] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
751 wtp->mps_tp.sop[(i*2) + 1] = ((value >> 24) & 0xFF);/*bit 24:31 in t5_wtp_data()
753 wtp->mps_tp.eop[(i*2) + 1] = ((value >> 16) & 0xFF);/*bit 16:23 in t5_wtp_data()
756 drop = ptp_mib->TP_MIB_TNL_CNG_DROP_0.value; in t5_wtp_data()
757 drop += ptp_mib->TP_MIB_TNL_CNG_DROP_1.value; in t5_wtp_data()
758 drop += ptp_mib->TP_MIB_TNL_CNG_DROP_2.value; in t5_wtp_data()
759 drop += ptp_mib->TP_MIB_TNL_CNG_DROP_3.value; in t5_wtp_data()
760 drop += ptp_mib->TP_MIB_OFD_CHN_DROP_0.value; in t5_wtp_data()
761 drop += ptp_mib->TP_MIB_OFD_CHN_DROP_1.value; in t5_wtp_data()
762 drop += ptp_mib->TP_MIB_OFD_CHN_DROP_2.value; in t5_wtp_data()
763 drop += ptp_mib->TP_MIB_OFD_CHN_DROP_3.value; in t5_wtp_data()
764 drop += ptp_mib->TP_MIB_FCOE_DROP_0.value; in t5_wtp_data()
765 drop += ptp_mib->TP_MIB_FCOE_DROP_1.value; in t5_wtp_data()
766 drop += ptp_mib->TP_MIB_FCOE_DROP_2.value; in t5_wtp_data()
767 drop += ptp_mib->TP_MIB_FCOE_DROP_3.value; in t5_wtp_data()
768 drop += ptp_mib->TP_MIB_OFD_VLN_DROP_0.value; in t5_wtp_data()
769 drop += ptp_mib->TP_MIB_OFD_VLN_DROP_1.value; in t5_wtp_data()
770 drop += ptp_mib->TP_MIB_OFD_VLN_DROP_2.value; in t5_wtp_data()
771 drop += ptp_mib->TP_MIB_OFD_VLN_DROP_3.value; in t5_wtp_data()
772 drop += ptp_mib->TP_MIB_USM_DROP.value; in t5_wtp_data()
778 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_RX0 + i), in t5_wtp_data()
781 wtp->tpcside_csw.sop[i] = ((value >> 28) & 0xF);/*bits 28:31*/ in t5_wtp_data()
782 wtp->tpcside_csw.eop[i] = ((value >> 24) & 0xF);/*bits 24:27*/ in t5_wtp_data()
783 wtp->tpcside_pm.sop[i] = ((value >> 20) & 0xF);/*bits 20:23*/ in t5_wtp_data()
784 wtp->tpcside_pm.eop[i] = ((value >> 16) & 0xF);/*bits 16:19*/ in t5_wtp_data()
785 wtp->tpcside_uturn.sop[i] = ((value >> 12) & 0xF);/*bits 12:15*/ in t5_wtp_data()
786 wtp->tpcside_uturn.eop[i] = ((value >> 8) & 0xF); /*bits 8:11*/ in t5_wtp_data()
787 wtp->tpcside_txcpl.sop[i] = ((value >> 4) & 0xF); /*bits 4:7*/ in t5_wtp_data()
788 wtp->tpcside_txcpl.eop[i] = ((value >> 0) & 0xF); /*bits 0:3*/ in t5_wtp_data()
827 value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT2 + (i * 0x10)); in t5_wtp_data()
828 wtp->pcie_dma1_stat2.sop[i] = ((value >> 8) & 0x0F); in t5_wtp_data()
829 wtp->pcie_dma1_stat2.eop[i] = ((value >> 8) & 0x0F); in t5_wtp_data()
830 wtp->pcie_dma1_stat2_core.sop[i] += value & 0x0F; in t5_wtp_data()
831 wtp->pcie_dma1_stat2_core.eop[i] += value & 0x0F; in t5_wtp_data()
836 value = t4_read_reg(padap, 0x30a88 + ((i * 4) << 12)); in t5_wtp_data()
837 wtp->mac_porrx_aframestra_ok.sop[i] = (value & 0xFF); in t5_wtp_data()
838 wtp->mac_porrx_aframestra_ok.eop[i] = (value & 0xFF); in t5_wtp_data()
842 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_7); in t5_wtp_data()
843 wtp->sge_debug_data_high_indx7.sop[0] = ((value >> 4) & 0x0F); in t5_wtp_data()
844 wtp->sge_debug_data_high_indx7.eop[0] = ((value >> 0) & 0x0F); in t5_wtp_data()
845 wtp->sge_debug_data_high_indx7.sop[1] = ((value >> 12) & 0x0F); in t5_wtp_data()
846 wtp->sge_debug_data_high_indx7.eop[1] = ((value >> 8) & 0x0F); in t5_wtp_data()
847 wtp->sge_debug_data_high_indx7.sop[2] = ((value >> 20) & 0x0F); in t5_wtp_data()
848 wtp->sge_debug_data_high_indx7.eop[2] = ((value >> 16) & 0x0F); in t5_wtp_data()
849 wtp->sge_debug_data_high_indx7.sop[3] = ((value >> 28) & 0x0F); in t5_wtp_data()
850 wtp->sge_debug_data_high_indx7.eop[3] = ((value >> 24) & 0x0F); in t5_wtp_data()
853 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_1); in t5_wtp_data()
854 wtp->sge_debug_data_high_indx1.sop[0] = ((value >> 20) & 0x0F); in t5_wtp_data()
855 wtp->sge_debug_data_high_indx1.eop[0] = ((value >> 16) & 0x0F); in t5_wtp_data()
856 wtp->sge_debug_data_high_indx1.sop[1] = ((value >> 28) & 0x0F); in t5_wtp_data()
857 wtp->sge_debug_data_high_indx1.eop[1] = ((value >> 24) & 0x0F); in t5_wtp_data()
861 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_TX0 + i), in t5_wtp_data()
864 wtp->utx_tpcside_tx.sop[i] = ((value >> 28) & 0xF);/*bits 28:31 in t5_wtp_data()
866 wtp->utx_tpcside_tx.eop[i] = ((value >> 24) & 0xF); in t5_wtp_data()
870 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_9); in t5_wtp_data()
871 wtp->sge_debug_data_high_indx9.sop[0] = ((value >> 20) & 0x0F); in t5_wtp_data()
872 wtp->sge_debug_data_high_indx9.sop[1] = ((value >> 28) & 0x0F); in t5_wtp_data()
873 wtp->sge_debug_data_high_indx9.eop[0] = ((value >> 16) & 0x0F); in t5_wtp_data()
874 wtp->sge_debug_data_high_indx9.eop[1] = ((value >> 24) & 0x0F); in t5_wtp_data()
875 wtp->sge_work_req_pkt.sop[0] = ((value >> 4) & 0x0F); in t5_wtp_data()
876 wtp->sge_work_req_pkt.sop[1] = ((value >> 12) & 0x0F); in t5_wtp_data()
879 value = t4_read_reg(padap, A_LE_DB_REQ_RSP_CNT); in t5_wtp_data()
880 wtp->le_db_rsp_cnt.sop = value & 0xF; in t5_wtp_data()
881 wtp->le_db_rsp_cnt.eop = (value >> 16) & 0xF; in t5_wtp_data()
885 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i), in t5_wtp_data()
888 wtp->tp_dbg_eside_pktx.sop[i] = ((value >> 12) & 0xF); in t5_wtp_data()
889 wtp->tp_dbg_eside_pktx.eop[i] = ((value >> 8) & 0xF); in t5_wtp_data()
893 value = t4_read_reg(padap, A_PCIE_DMAW_SOP_CNT); in t5_wtp_data()
895 wtp->pcie_core_dmaw.sop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
896 wtp->pcie_core_dmaw.sop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
897 wtp->pcie_core_dmaw.sop[2] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
898 wtp->pcie_core_dmaw.sop[3] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
900 value = t4_read_reg(padap, A_PCIE_DMAW_EOP_CNT); in t5_wtp_data()
902 wtp->pcie_core_dmaw.eop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
903 wtp->pcie_core_dmaw.eop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
904 wtp->pcie_core_dmaw.eop[2] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
905 wtp->pcie_core_dmaw.eop[3] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
907 value = t4_read_reg(padap, A_PCIE_DMAI_CNT); in t5_wtp_data()
909 wtp->pcie_core_dmai.sop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
910 wtp->pcie_core_dmai.sop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
911 wtp->pcie_core_dmai.sop[2] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
912 wtp->pcie_core_dmai.sop[3] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
914 wtp->pcie_core_dmai.eop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
915 wtp->pcie_core_dmai.eop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
916 wtp->pcie_core_dmai.eop[2] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
917 wtp->pcie_core_dmai.eop[3] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
942 u32 value = 0; in t6_wtp_data() local
965 value = t4_read_reg(padap, A_PCIE_T5_CMD_STAT2); in t6_wtp_data()
966 wtp->pcie_cmd_stat2.sop[0] = value & 0xFF; in t6_wtp_data()
967 wtp->pcie_cmd_stat2.eop[0] = value & 0xFF; in t6_wtp_data()
969 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_7); in t6_wtp_data()
970 wtp->sge_pcie_cmd_req.sop[0] = ((value >> 20) & 0x0F); in t6_wtp_data()
971 wtp->sge_pcie_cmd_req.eop[0] = ((value >> 16) & 0x0F); in t6_wtp_data()
972 wtp->sge_pcie_cmd_req.sop[1] = ((value >> 28) & 0x0F); in t6_wtp_data()
973 wtp->sge_pcie_cmd_req.eop[1] = ((value >> 24) & 0x0F); in t6_wtp_data()
975 value = t4_read_reg(padap, A_PCIE_T5_CMD_STAT3); in t6_wtp_data()
976 wtp->pcie_cmd_stat3.sop[0] = value & 0xFF; in t6_wtp_data()
977 wtp->pcie_cmd_stat3.eop[0] = value & 0xFF; in t6_wtp_data()
993 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_9); in t6_wtp_data()
994 wtp->sge_work_req_pkt.sop[0] = ((value >> 4) & 0x0F); in t6_wtp_data()
995 wtp->sge_work_req_pkt.eop[0] = ((value >> 0) & 0x0F); in t6_wtp_data()
998 value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT2 + (i * 0x10)); in t6_wtp_data()
999 wtp->pcie_dma1_stat2.sop[i] = ((value >> 8) & 0x0F); in t6_wtp_data()
1000 wtp->pcie_dma1_stat2.eop[i] = ((value >> 8) & 0x0F); in t6_wtp_data()
1001 wtp->pcie_dma1_stat2_core.sop[i] = value & 0x0F; in t6_wtp_data()
1002 wtp->pcie_dma1_stat2_core.eop[i] = value & 0x0F; in t6_wtp_data()
1007 value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT3 + (i * 0x10)); in t6_wtp_data()
1008 wtp->pcie_t5_dma_stat3.sop[i] = value & 0xFF; in t6_wtp_data()
1009 wtp->pcie_t5_dma_stat3.eop[i] = ((value >> 16) & 0xFF); in t6_wtp_data()
1014 value = t4_read_reg(padap, A_ULP_TX_SE_CNT_CH0 + (i * 4)); in t6_wtp_data()
1015 wtp->ulp_se_cnt_chx.sop[i] = ((value >> 28) & 0x0F); in t6_wtp_data()
1016 wtp->ulp_se_cnt_chx.eop[i] = ((value >> 24) & 0x0F); in t6_wtp_data()
1021 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_RX0 + i), in t6_wtp_data()
1024 wtp->utx_tpcside.sop[i] = ((value >> 28) & 0xF);/*bits 28:31*/ in t6_wtp_data()
1025 wtp->utx_tpcside.eop[i] = ((value >> 24) & 0xF);/*bits 24:27*/ in t6_wtp_data()
1026 wtp->tpcside_rxarb.sop[i] = ((value >> 12) & 0xF);/*bits 12:15*/ in t6_wtp_data()
1027 wtp->tpcside_rxarb.eop[i] = ((value >> 8) & 0xF); /*bits 8:11*/ in t6_wtp_data()
1031 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i), in t6_wtp_data()
1035 wtp->tpeside_mps.sop[i] = ((value >> 28) & 0xF); /*bits 28:31*/ in t6_wtp_data()
1036 wtp->tpeside_mps.eop[i] = ((value >> 24) & 0xF); /*bits 24:27*/ in t6_wtp_data()
1040 value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_TP01 + (i << 2))); in t6_wtp_data()
1041 wtp->tp_mps.sop[(i*2)] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t6_wtp_data()
1042 wtp->tp_mps.eop[(i*2)] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t6_wtp_data()
1043 wtp->tp_mps.sop[(i*2) + 1] = ((value >> 24) & 0xFF);/*bit 24:31 in t6_wtp_data()
1045 wtp->tp_mps.eop[(i*2) + 1] = ((value >> 16) & 0xFF);/*bit 16:23 in t6_wtp_data()
1050 value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_MAC01 + (i << 2))); in t6_wtp_data()
1051 wtp->mps_xgm.sop[(i*2)] = ((value >> 8) & 0xFF);/*bit 8:15*/ in t6_wtp_data()
1052 wtp->mps_xgm.eop[(i*2)] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t6_wtp_data()
1053 wtp->mps_xgm.sop[(i*2) + 1] = ((value >> 24) & 0xFF);/*bit 24:31 in t6_wtp_data()
1055 wtp->mps_xgm.eop[(i*2) + 1] = ((value >> 16) & 0xFF);/*bit 16:23 in t6_wtp_data()
1061 value = t4_read_reg(padap, 0x3081c + ((i * 4) << 12)); in t6_wtp_data()
1062 wtp->mac_portx_pkt_count.sop[i] = ((value >> 24) & 0xFF); in t6_wtp_data()
1063 wtp->mac_portx_pkt_count.eop[i] = ((value >> 16) & 0xFF); in t6_wtp_data()
1064 wtp->mac_porrx_pkt_count.sop[i] = ((value >> 8) & 0xFF); in t6_wtp_data()
1065 wtp->mac_porrx_pkt_count.eop[i] = ((value >> 0) & 0xFF); in t6_wtp_data()
1069 value = t4_read_reg(padap, 0x30f20 + ((i * 4) << 12)); in t6_wtp_data()
1070 wtp->mac_portx_aframestra_ok.sop[i] = value & 0xff; in t6_wtp_data()
1071 wtp->mac_portx_aframestra_ok.eop[i] = value & 0xff; in t6_wtp_data()
1077 value = t4_read_reg(padap, 0x30f60 + ((i * 4) << 12)); in t6_wtp_data()
1078 wtp->mac_portx_etherstatspkts.sop[i] = value & 0xff; in t6_wtp_data()
1079 wtp->mac_portx_etherstatspkts.eop[i] = value & 0xff; in t6_wtp_data()
1084 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_7); in t6_wtp_data()
1085 wtp->sge_debug_data_high_indx7.sop[0] = ((value >> 4) & 0x0F); in t6_wtp_data()
1086 wtp->sge_debug_data_high_indx7.eop[0] = ((value >> 0) & 0x0F); in t6_wtp_data()
1087 wtp->sge_debug_data_high_indx7.sop[1] = ((value >> 12) & 0x0F); in t6_wtp_data()
1088 wtp->sge_debug_data_high_indx7.eop[1] = ((value >> 8) & 0x0F); in t6_wtp_data()
1091 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_1); in t6_wtp_data()
1092 wtp->sge_debug_data_high_indx1.sop[0] = ((value >> 20) & 0x0F); in t6_wtp_data()
1093 wtp->sge_debug_data_high_indx1.eop[0] = ((value >> 16) & 0x0F); in t6_wtp_data()
1094 wtp->sge_debug_data_high_indx1.sop[1] = ((value >> 28) & 0x0F); in t6_wtp_data()
1095 wtp->sge_debug_data_high_indx1.eop[1] = ((value >> 24) & 0x0F); in t6_wtp_data()
1097 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_9); in t6_wtp_data()
1098 wtp->sge_debug_data_high_indx9.sop[0] = ((value >> 20) & 0x0F); in t6_wtp_data()
1099 wtp->sge_debug_data_high_indx9.sop[1] = ((value >> 28) & 0x0F); in t6_wtp_data()
1101 wtp->sge_debug_data_high_indx9.eop[0] = ((value >> 16) & 0x0F); in t6_wtp_data()
1102 wtp->sge_debug_data_high_indx9.eop[1] = ((value >> 24) & 0x0F); in t6_wtp_data()
1105 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_TX0 + i), in t6_wtp_data()
1108 wtp->utx_tpcside_tx.sop[i] = ((value >> 28) & 0xF);/*bits 28:31 in t6_wtp_data()
1110 wtp->utx_tpcside_tx.eop[i] = ((value >> 24) & 0xF); in t6_wtp_data()
1115 value = t4_read_reg(padap, (A_ULP_RX_SE_CNT_CH0 + (i*4))); in t6_wtp_data()
1117 wtp->pmrx_ulprx.sop[i] = ((value >> 4) & 0xF); /*bits 4:7*/ in t6_wtp_data()
1118 wtp->pmrx_ulprx.eop[i] = ((value >> 0) & 0xF); /*bits 0:3*/ in t6_wtp_data()
1119 wtp->ulprx_tpcside.sop[i] = ((value >> 28) & 0xF);/*bits 28:31*/ in t6_wtp_data()
1120 wtp->ulprx_tpcside.eop[i] = ((value >> 24) & 0xF);/*bits 24:27*/ in t6_wtp_data()
1124 value = t4_read_reg(padap, A_LE_DB_REQ_RSP_CNT); in t6_wtp_data()
1125 wtp->le_db_rsp_cnt.sop = value & 0xF; in t6_wtp_data()
1126 wtp->le_db_rsp_cnt.eop = (value >> 16) & 0xF; in t6_wtp_data()
1130 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i), in t6_wtp_data()
1133 wtp->tp_dbg_eside_pktx.sop[i] = ((value >> 12) & 0xF); in t6_wtp_data()
1134 wtp->tp_dbg_eside_pktx.eop[i] = ((value >> 8) & 0xF); in t6_wtp_data()
1139 value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_OUT01 + (i << 2))); in t6_wtp_data()
1140 wtp->mps_tp.sop[0] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t6_wtp_data()
1141 wtp->mps_tp.eop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t6_wtp_data()
1142 wtp->mps_tp.sop[1] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t6_wtp_data()
1143 wtp->mps_tp.eop[1] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t6_wtp_data()
1145 drop = ptp_mib->TP_MIB_TNL_CNG_DROP_0.value; in t6_wtp_data()
1146 drop += ptp_mib->TP_MIB_TNL_CNG_DROP_1.value; in t6_wtp_data()
1147 drop += ptp_mib->TP_MIB_OFD_CHN_DROP_0.value; in t6_wtp_data()
1148 drop += ptp_mib->TP_MIB_OFD_CHN_DROP_1.value; in t6_wtp_data()
1149 drop += ptp_mib->TP_MIB_FCOE_DROP_0.value; in t6_wtp_data()
1150 drop += ptp_mib->TP_MIB_FCOE_DROP_1.value; in t6_wtp_data()
1151 drop += ptp_mib->TP_MIB_OFD_VLN_DROP_0.value; in t6_wtp_data()
1152 drop += ptp_mib->TP_MIB_OFD_VLN_DROP_1.value; in t6_wtp_data()
1153 drop += ptp_mib->TP_MIB_USM_DROP.value; in t6_wtp_data()
1159 value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_IN0 + (i << 2))); in t6_wtp_data()
1161 wtp->xgm_mps.sop[i] = ((value >> 8) & 0xFF); /*bits 8:15*/ in t6_wtp_data()
1162 wtp->xgm_mps.eop[i] = ((value >> 0) & 0xFF); /*bits 0:7*/ in t6_wtp_data()
1165 value = t4_read_reg(padap, (A_MPS_RX_CLS_DROP_CNT0 + (i << 2))); in t6_wtp_data()
1166 drop += (value & 0xFFFF) + ((value >> 16) & 0xFFFF); in t6_wtp_data()
1171 value = t4_read_reg(padap, 0x30e20 + ((i * 4) << 12)); in t6_wtp_data()
1172 wtp->mac_porrx_aframestra_ok.sop[i] = value & 0xff; in t6_wtp_data()
1173 wtp->mac_porrx_aframestra_ok.eop[i] = value & 0xff; in t6_wtp_data()
1178 value = t4_read_reg(padap, 0x30e60 + ((i * 4) << 12)); in t6_wtp_data()
1179 wtp->mac_porrx_etherstatspkts.sop[i] = value & 0xff; in t6_wtp_data()
1180 wtp->mac_porrx_etherstatspkts.eop[i] = value & 0xff; in t6_wtp_data()
1191 value = t4_read_reg(padap, in t6_wtp_data()
1194 drop += value; in t6_wtp_data()
1195 value = t4_read_reg(padap, in t6_wtp_data()
1198 value = t4_read_reg(padap, in t6_wtp_data()
1201 drop += value; in t6_wtp_data()
1202 value = t4_read_reg(padap, in t6_wtp_data()
1206 value = t4_read_reg(padap, in t6_wtp_data()
1209 drop += value; in t6_wtp_data()
1210 value = t4_read_reg(padap, in t6_wtp_data()
1213 value = t4_read_reg(padap, in t6_wtp_data()
1216 drop += value; in t6_wtp_data()
1217 value = t4_read_reg(padap, in t6_wtp_data()
1221 value = t4_read_reg(padap, in t6_wtp_data()
1224 drop += value; in t6_wtp_data()
1232 value = t4_read_reg(padap, in t6_wtp_data()
1235 err += value; in t6_wtp_data()
1236 value = t4_read_reg(padap, in t6_wtp_data()
1240 value = t4_read_reg(padap, in t6_wtp_data()
1243 err += value; in t6_wtp_data()
1244 value = t4_read_reg(padap, in t6_wtp_data()
1248 value = t4_read_reg(padap, in t6_wtp_data()
1251 err += value; in t6_wtp_data()
1252 value = t4_read_reg(padap, in t6_wtp_data()
1256 value = t4_read_reg(padap, in t6_wtp_data()
1259 err += value; in t6_wtp_data()
1260 value = t4_read_reg(padap, in t6_wtp_data()
1264 value = t4_read_reg(padap, in t6_wtp_data()
1267 err += value; in t6_wtp_data()
1268 value = t4_read_reg(padap, in t6_wtp_data()
1272 value = t4_read_reg(padap, in t6_wtp_data()
1275 err += value; in t6_wtp_data()
1276 value = t4_read_reg(padap, in t6_wtp_data()