Lines Matching refs:setting
403 uint64_t setting : 5; /**< Setting to place on the RXCLK (GMII receive clk) member
407 uint64_t setting : 5;
428 uint64_t setting : 5; /**< Setting to place on the RXD (GMII receive data) member
432 uint64_t setting : 5;
547 uint64_t setting : 5; /**< Setting to place on the RXD (MII receive data) member
551 uint64_t setting : 5;
664 uint64_t setting : 5; /**< The rld_dll setting bypass value */ member
666 uint64_t setting : 5;
883 uint64_t setting : 5; /**< RLDCK90 DLL Setting(debug) */ member
885 uint64_t setting : 5;
896 uint64_t setting : 5; /**< This is the read-only true rld dll_setting. */ member
898 uint64_t setting : 5;
953 …uint64_t setting : 5; /**< Setting to place on the open-loop RXC delay line … member
955 uint64_t setting : 5;
1143 …uint64_t setting : 5; /**< Setting to place on the open-loop TXC delay line … member
1145 uint64_t setting : 5;