Lines Matching +full:0 +full:x5b
19 reg = <0x80000000 0x80000000>;
25 pinctrl-0 = <&pinctrl_gpio_keys>;
45 pinctrl-0 = <&pinctrl_spi4>;
51 #size-cells = <0>;
53 extended_io: gpio-expander@0 {
57 reg = <0>;
76 pinctrl-0 = <&pinctrl_usb_otg2_vbus_reg>;
96 pinctrl-0 = <&pinctrl_brcm_reg>;
114 pinctrl-0 = <&pinctrl_flexcan2_reg>;
124 pinctrl-0 = <&pinctrl_enet2_reg>;
132 pwms = <&pwm1 0 5000000 0>;
133 brightness-levels = <0 4 8 16 32 64 128 255>;
171 pinctrl-0 = <&pinctrl_ecspi3>;
175 tsc2046@0 {
177 reg = <0>;
180 pinctrl-0 = <&pinctrl_tsc2046_pendown>;
182 interrupts = <29 0>;
184 ti,x-min = /bits/ 16 <0>;
185 ti,x-max = /bits/ 16 <0>;
186 ti,y-min = /bits/ 16 <0>;
187 ti,y-max = /bits/ 16 <0>;
188 ti,pressure-max = /bits/ 16 <0>;
196 pinctrl-0 = <&pinctrl_enet1>;
200 assigned-clock-rates = <0>, <100000000>;
209 #size-cells = <0>;
211 ethphy0: ethernet-phy@0 {
212 reg = <0>;
223 pinctrl-0 = <&pinctrl_enet2>;
227 assigned-clock-rates = <0>, <100000000>;
237 pinctrl-0 = <&pinctrl_flexcan2>;
244 pinctrl-0 = <&pinctrl_i2c1>;
249 reg = <0x08>;
340 pinctrl-0 = <&pinctrl_i2c2>;
345 reg = <0x60>;
351 pinctrl-0 = <&pinctrl_i2c3>;
357 pinctrl-0 = <&pinctrl_i2c4>;
362 reg = <0x1a>;
371 pinctrl-0 = <&pinctrl_lcdif>;
400 pinctrl-0 = <&pinctrl_uart1>;
408 pinctrl-0 = <&pinctrl_uart6>;
428 pinctrl-0 = <&pinctrl_usdhc1>;
429 cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
438 pinctrl-0 = <&pinctrl_usdhc2>;
451 pinctrl-0 = <&pinctrl_usdhc3>;
464 pinctrl-0 = <&pinctrl_wdog>;
470 pinctrl-0 = <&pinctrl_hog>;
475 MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x14
481 MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO 0x2
482 MX7D_PAD_SAI2_TX_BCLK__ECSPI3_MOSI 0x2
483 MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK 0x2
484 MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x59
490 MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x3
491 MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x3
492 MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1
493 MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1
494 MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1
495 MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1
496 MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1
497 MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1
498 MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1
499 MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1
500 MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1
501 MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1
502 MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1
503 MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1
509 MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC 0x1
510 MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0 0x1
511 MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1 0x1
512 MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2 0x1
513 MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3 0x1
514 MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL 0x1
515 MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC 0x1
516 MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0 0x1
517 MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1 0x1
518 MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2 0x1
519 MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3 0x1
520 MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x1
526 MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x14
532 MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x59
533 MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x59
539 MX7D_PAD_EPDC_DATA14__GPIO2_IO14 0x59 /* CAN_STBY */
545 MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x59
546 MX7D_PAD_SD2_WP__GPIO5_IO10 0x59
552 MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x34 /* bt reg on */
558 MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
559 MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
565 MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
566 MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f
572 MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f
573 MX7D_PAD_I2C3_SCL__I2C3_SCL 0x4000007f
579 MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f
580 MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f
586 MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79
587 MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79
588 MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79
589 MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79
590 MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79
591 MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79
592 MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79
593 MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79
594 MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79
595 MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79
596 MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79
597 MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79
598 MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79
599 MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79
600 MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79
601 MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79
602 MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79
603 MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79
604 MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79
605 MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79
606 MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79
607 MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79
608 MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79
609 MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79
610 MX7D_PAD_LCD_CLK__LCD_CLK 0x79
611 MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79
612 MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79
613 MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79
614 MX7D_PAD_LCD_RESET__LCD_RESET 0x79
620 MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x59
621 MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x59
622 MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x59
628 MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x59
634 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79
635 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79
641 MX7D_PAD_SAI1_TX_BCLK__UART5_DCE_TX 0x79
642 MX7D_PAD_SAI1_RX_DATA__UART5_DCE_RX 0x79
643 MX7D_PAD_SAI1_TX_SYNC__UART5_DCE_CTS 0x79
644 MX7D_PAD_SAI1_TX_DATA__UART5_DCE_RTS 0x79
650 MX7D_PAD_ECSPI1_MOSI__UART6_DCE_TX 0x79
651 MX7D_PAD_ECSPI1_SCLK__UART6_DCE_RX 0x79
652 MX7D_PAD_ECSPI1_SS0__UART6_DCE_CTS 0x79
653 MX7D_PAD_ECSPI1_MISO__UART6_DCE_RTS 0x79
659 MX7D_PAD_SD1_CMD__SD1_CMD 0x59
660 MX7D_PAD_SD1_CLK__SD1_CLK 0x19
661 MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
662 MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
663 MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
664 MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
665 MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */
666 MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
667 MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* vmmc */
673 MX7D_PAD_SD2_CMD__SD2_CMD 0x59
674 MX7D_PAD_SD2_CLK__SD2_CLK 0x19
675 MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
676 MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
677 MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
678 MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
684 MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
685 MX7D_PAD_SD2_CLK__SD2_CLK 0x1a
686 MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
687 MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a
688 MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a
689 MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5a
695 MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
696 MX7D_PAD_SD2_CLK__SD2_CLK 0x1b
697 MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b
698 MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b
699 MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b
700 MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5b
707 MX7D_PAD_SD3_CMD__SD3_CMD 0x59
708 MX7D_PAD_SD3_CLK__SD3_CLK 0x19
709 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
710 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
711 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
712 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
713 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
714 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
715 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
716 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
717 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
723 MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
724 MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
725 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
726 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
727 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
728 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
729 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
730 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
731 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
732 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
733 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
739 MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
740 MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
741 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
742 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
743 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
744 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
745 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
746 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
747 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
748 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
749 MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
757 pinctrl-0 = <&pinctrl_pwm1>;
764 MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74
770 MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x30
776 MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14