Lines Matching refs:ShiftValue
14849 unsigned &ShiftValue, in canLowerSRLToRoundingShiftForVT() argument
14862 ShiftValue = ShiftOp1->getZExtValue(); in canLowerSRLToRoundingShiftForVT()
14863 if (ShiftValue < 1 || ShiftValue > ResVT.getScalarSizeInBits()) in canLowerSRLToRoundingShiftForVT()
14874 if (ShiftValue > ExtraBits && !Add->getFlags().hasNoUnsignedWrap()) in canLowerSRLToRoundingShiftForVT()
14882 if (AddValue != 1ULL << (ShiftValue - 1)) in canLowerSRLToRoundingShiftForVT()
14918 unsigned ShiftValue; in LowerVectorSRA_SRL_SHL() local
14919 if (canLowerSRLToRoundingShiftForVT(Op, VT, DAG, ShiftValue, RShOperand)) in LowerVectorSRA_SRL_SHL()
14922 DAG.getTargetConstant(ShiftValue, DL, MVT::i32)); in LowerVectorSRA_SRL_SHL()
22090 SDValue ShiftValue = Op0.getOperand(1); in tryCombineExtendRShTrunc() local
22091 if (RshOpc != Op1.getOpcode() || ShiftValue != Op1.getOperand(1)) in tryCombineExtendRShTrunc()
22107 ShiftValue); in tryCombineExtendRShTrunc()
22136 unsigned ShiftValue; in trySimplifySrlAddToRshrnb() local
22138 if (!canLowerSRLToRoundingShiftForVT(Srl, ResVT, DAG, ShiftValue, RShOperand)) in trySimplifySrlAddToRshrnb()
22142 {RShOperand, DAG.getTargetConstant(ShiftValue, DL, MVT::i32)}); in trySimplifySrlAddToRshrnb()