2767 	uint32_t wb_data[2];  in elink_update_pfc_bmac1()  local
2778 	wb_data[0] = val;  in elink_update_pfc_bmac1()
2779 	wb_data[1] = 0;  in elink_update_pfc_bmac1()
2780 	REG_WR_DMAE(sc, bmac_addr + BIGMAC_REGISTER_RX_CONTROL, wb_data, 2);  in elink_update_pfc_bmac1()
2788 	wb_data[0] = val;  in elink_update_pfc_bmac1()
2789 	wb_data[1] = 0;  in elink_update_pfc_bmac1()
2790 	REG_WR_DMAE(sc, bmac_addr + BIGMAC_REGISTER_TX_CONTROL, wb_data, 2);  in elink_update_pfc_bmac1()
2800 	uint32_t wb_data[2];  in elink_update_pfc_bmac2()  local
2811 	wb_data[0] = val;  in elink_update_pfc_bmac2()
2812 	wb_data[1] = 0;  in elink_update_pfc_bmac2()
2813 	REG_WR_DMAE(sc, bmac_addr + BIGMAC2_REGISTER_RX_CONTROL, wb_data, 2);  in elink_update_pfc_bmac2()
2822 	wb_data[0] = val;  in elink_update_pfc_bmac2()
2823 	wb_data[1] = 0;  in elink_update_pfc_bmac2()
2824 	REG_WR_DMAE(sc, bmac_addr + BIGMAC2_REGISTER_TX_CONTROL, wb_data, 2);  in elink_update_pfc_bmac2()
2829 		wb_data[0] = 0x0;  in elink_update_pfc_bmac2()
2830 		wb_data[0] |= (1<<0);  /* RX */  in elink_update_pfc_bmac2()
2831 		wb_data[0] |= (1<<1);  /* TX */  in elink_update_pfc_bmac2()
2832 		wb_data[0] |= (1<<2);  /* Force initial Xon */  in elink_update_pfc_bmac2()
2833 		wb_data[0] |= (1<<3);  /* 8 cos */  in elink_update_pfc_bmac2()
2834 		wb_data[0] |= (1<<5);  /* STATS */  in elink_update_pfc_bmac2()
2835 		wb_data[1] = 0;  in elink_update_pfc_bmac2()
2837 			    wb_data, 2);  in elink_update_pfc_bmac2()
2839 		wb_data[0] &= ~(1<<2);  in elink_update_pfc_bmac2()
2843 		wb_data[0] = 0x8;  in elink_update_pfc_bmac2()
2844 		wb_data[1] = 0;  in elink_update_pfc_bmac2()
2847 	REG_WR_DMAE(sc, bmac_addr + BIGMAC2_REGISTER_PFC_CONTROL, wb_data, 2);  in elink_update_pfc_bmac2()
2858 	wb_data[0] = val;  in elink_update_pfc_bmac2()
2859 	wb_data[1] = 0;  in elink_update_pfc_bmac2()
2861 		    wb_data, 2);  in elink_update_pfc_bmac2()
2873 	wb_data[0] = val;  in elink_update_pfc_bmac2()
2874 	wb_data[1] = 0;  in elink_update_pfc_bmac2()
2875 	REG_WR_DMAE(sc, bmac_addr + BIGMAC2_REGISTER_BMAC_CONTROL, wb_data, 2);  in elink_update_pfc_bmac2()
3093 	uint32_t wb_data[2];  in elink_bmac1_enable()  local
3099 	wb_data[0] = 0x3c;  in elink_bmac1_enable()
3100 	wb_data[1] = 0;  in elink_bmac1_enable()
3102 		    wb_data, 2);  in elink_bmac1_enable()
3105 	wb_data[0] = ((params->mac_addr[2] << 24) |  in elink_bmac1_enable()
3109 	wb_data[1] = ((params->mac_addr[0] << 8) |  in elink_bmac1_enable()
3111 	REG_WR_DMAE(sc, bmac_addr + BIGMAC_REGISTER_TX_SOURCE_ADDR, wb_data, 2);  in elink_bmac1_enable()
3119 	wb_data[0] = val;  in elink_bmac1_enable()
3120 	wb_data[1] = 0;  in elink_bmac1_enable()
3121 	REG_WR_DMAE(sc, bmac_addr + BIGMAC_REGISTER_BMAC_CONTROL, wb_data, 2);  in elink_bmac1_enable()
3124 	wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD;  in elink_bmac1_enable()
3125 	wb_data[1] = 0;  in elink_bmac1_enable()
3126 	REG_WR_DMAE(sc, bmac_addr + BIGMAC_REGISTER_RX_MAX_SIZE, wb_data, 2);  in elink_bmac1_enable()
3131 	wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD;  in elink_bmac1_enable()
3132 	wb_data[1] = 0;  in elink_bmac1_enable()
3133 	REG_WR_DMAE(sc, bmac_addr + BIGMAC_REGISTER_TX_MAX_SIZE, wb_data, 2);  in elink_bmac1_enable()
3136 	wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD;  in elink_bmac1_enable()
3137 	wb_data[1] = 0;  in elink_bmac1_enable()
3138 	REG_WR_DMAE(sc, bmac_addr + BIGMAC_REGISTER_CNT_MAX_SIZE, wb_data, 2);  in elink_bmac1_enable()
3141 	wb_data[0] = 0x1000200;  in elink_bmac1_enable()
3142 	wb_data[1] = 0;  in elink_bmac1_enable()
3144 		    wb_data, 2);  in elink_bmac1_enable()
3148 		wb_data[0] = 0xf000;  in elink_bmac1_enable()
3149 		wb_data[1] = 0;  in elink_bmac1_enable()
3151 			    wb_data, 2);  in elink_bmac1_enable()
3166 	uint32_t wb_data[2];  in elink_bmac2_enable()  local
3170 	wb_data[0] = 0;  in elink_bmac2_enable()
3171 	wb_data[1] = 0;  in elink_bmac2_enable()
3172 	REG_WR_DMAE(sc, bmac_addr + BIGMAC2_REGISTER_BMAC_CONTROL, wb_data, 2);  in elink_bmac2_enable()
3176 	wb_data[0] = 0x3c;  in elink_bmac2_enable()
3177 	wb_data[1] = 0;  in elink_bmac2_enable()
3179 		    wb_data, 2);  in elink_bmac2_enable()
3184 	wb_data[0] = ((params->mac_addr[2] << 24) |  in elink_bmac2_enable()
3188 	wb_data[1] = ((params->mac_addr[0] << 8) |  in elink_bmac2_enable()
3191 		    wb_data, 2);  in elink_bmac2_enable()
3196 	wb_data[0] = 0x1000200;  in elink_bmac2_enable()
3197 	wb_data[1] = 0;  in elink_bmac2_enable()
3199 		    wb_data, 2);  in elink_bmac2_enable()
3203 	wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD;  in elink_bmac2_enable()
3204 	wb_data[1] = 0;  in elink_bmac2_enable()
3205 	REG_WR_DMAE(sc, bmac_addr + BIGMAC2_REGISTER_RX_MAX_SIZE, wb_data, 2);  in elink_bmac2_enable()
3209 	wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD;  in elink_bmac2_enable()
3210 	wb_data[1] = 0;  in elink_bmac2_enable()
3211 	REG_WR_DMAE(sc, bmac_addr + BIGMAC2_REGISTER_TX_MAX_SIZE, wb_data, 2);  in elink_bmac2_enable()
3214 	wb_data[0] = ELINK_ETH_MAX_JUMBO_PACKET_SIZE + ELINK_ETH_OVREHEAD - 2;  in elink_bmac2_enable()
3215 	wb_data[1] = 0;  in elink_bmac2_enable()
3216 	REG_WR_DMAE(sc, bmac_addr + BIGMAC2_REGISTER_CNT_MAX_SIZE, wb_data, 2);  in elink_bmac2_enable()
3272 	uint32_t wb_data[2];  in elink_set_bmac_rx()  local
3284 		REG_RD_DMAE(sc, bmac_addr, wb_data, 2);  in elink_set_bmac_rx()
3286 			wb_data[0] |= ELINK_BMAC_CONTROL_RX_ENABLE;  in elink_set_bmac_rx()
3288 			wb_data[0] &= ~ELINK_BMAC_CONTROL_RX_ENABLE;  in elink_set_bmac_rx()
3289 		REG_WR_DMAE(sc, bmac_addr, wb_data, 2);  in elink_set_bmac_rx()
14820 		uint32_t wb_data[2];  in elink_check_half_open_conn()  local
14829 		REG_RD_DMAE(sc, mac_base + lss_status_reg, wb_data, 2);  in elink_check_half_open_conn()
14830 		lss_status = (wb_data[0] > 0);  in elink_check_half_open_conn()