Lines Matching refs:X86InstrInfo
77 void X86InstrInfo::anchor() {} in anchor()
79 X86InstrInfo::X86InstrInfo(X86Subtarget &STI) in X86InstrInfo() function in X86InstrInfo
90 X86InstrInfo::isCoalescableExtInstr(const MachineInstr &MI, in isCoalescableExtInstr()
138 bool X86InstrInfo::isDataInvariant(MachineInstr &MI) { in isDataInvariant()
433 bool X86InstrInfo::isDataInvariantLoad(MachineInstr &MI) { in isDataInvariantLoad()
623 int X86InstrInfo::getSPAdjust(const MachineInstr &MI) const { in getSPAdjust()
677 bool X86InstrInfo::isFrameOperand(const MachineInstr &MI, unsigned int Op, in isFrameOperand()
880 unsigned X86InstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot()
883 return X86InstrInfo::isLoadFromStackSlot(MI, FrameIndex, Dummy); in isLoadFromStackSlot()
886 unsigned X86InstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot()
895 unsigned X86InstrInfo::isLoadFromStackSlotPostFE(const MachineInstr &MI, in isLoadFromStackSlotPostFE()
914 unsigned X86InstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot()
917 return X86InstrInfo::isStoreToStackSlot(MI, FrameIndex, Dummy); in isStoreToStackSlot()
920 unsigned X86InstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot()
930 unsigned X86InstrInfo::isStoreToStackSlotPostFE(const MachineInstr &MI, in isStoreToStackSlotPostFE()
966 bool X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr &MI, in isReallyTriviallyReMaterializable()
1125 void X86InstrInfo::reMaterialize(MachineBasicBlock &MBB, in reMaterialize()
1158 bool X86InstrInfo::hasLiveCondCodeDef(MachineInstr &MI) const { in hasLiveCondCodeDef()
1189 bool X86InstrInfo::classifyLEAReg(MachineInstr &MI, const MachineOperand &Src, in classifyLEAReg()
1245 MachineInstr *X86InstrInfo::convertToThreeAddressWithLEA( in convertToThreeAddressWithLEA()
1377 X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, in convertToThreeAddress()
1841 unsigned X86InstrInfo::getFMA3OpcodeToCommuteOperands( in getFMA3OpcodeToCommuteOperands()
2011 MachineInstr *X86InstrInfo::commuteInstructionImpl(MachineInstr &MI, bool NewMI, in commuteInstructionImpl()
2359 X86InstrInfo::findThreeSrcCommutedOpIndices(const MachineInstr &MI, in findThreeSrcCommutedOpIndices()
2462 bool X86InstrInfo::findCommutedOpIndices(const MachineInstr &MI, in findCommutedOpIndices()
2690 bool X86InstrInfo::hasCommutePreference(MachineInstr &MI, bool &Commute) const { in hasCommutePreference()
2922 bool X86InstrInfo::isUnconditionalTailCall(const MachineInstr &MI) const { in isUnconditionalTailCall()
2936 bool X86InstrInfo::canMakeTailCallConditional( in canMakeTailCallConditional()
2967 void X86InstrInfo::replaceBranchWithTailCall( in replaceBranchWithTailCall()
3032 bool X86InstrInfo::AnalyzeBranchImpl( in AnalyzeBranchImpl()
3198 bool X86InstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch()
3207 bool X86InstrInfo::analyzeBranchPredicate(MachineBasicBlock &MBB, in analyzeBranchPredicate()
3276 unsigned X86InstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch()
3299 unsigned X86InstrInfo::insertBranch(MachineBasicBlock &MBB, in insertBranch()
3358 bool X86InstrInfo::canInsertSelect(const MachineBasicBlock &MBB, in canInsertSelect()
3395 void X86InstrInfo::insertSelect(MachineBasicBlock &MBB, in insertSelect()
3494 void X86InstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
3580 X86InstrInfo::isCopyInstrImpl(const MachineInstr &MI) const { in isCopyInstrImpl()
3721 X86InstrInfo::getAddrModeFromMemoryOp(const MachineInstr &MemI, in getAddrModeFromMemoryOp()
3747 bool X86InstrInfo::getConstValDefinedInReg(const MachineInstr &MI, in getConstValDefinedInReg()
3759 bool X86InstrInfo::preservesZeroValueInReg( in preservesZeroValueInReg()
3787 bool X86InstrInfo::getMemOperandsWithOffsetWidth( in getMemOperandsWithOffsetWidth()
3844 void X86InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot()
3876 void X86InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, in loadRegFromStackSlot()
3906 bool X86InstrInfo::analyzeCompare(const MachineInstr &MI, Register &SrcReg, in analyzeCompare()
4191 bool X86InstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg, in optimizeCompareInstr()
4479 MachineInstr *X86InstrInfo::optimizeLoadInstr(MachineInstr &MI, in optimizeLoadInstr()
4723 bool X86InstrInfo::expandPostRAPseudo(MachineInstr &MI) const { in expandPostRAPseudo()
4982 unsigned X86InstrInfo::getPartialRegUpdateClearance( in getPartialRegUpdateClearance()
5289 X86InstrInfo::getUndefRegClearance(const MachineInstr &MI, unsigned OpNum, in getUndefRegClearance()
5299 void X86InstrInfo::breakPartialRegDependency( in breakPartialRegDependency()
5463 MachineInstr *X86InstrInfo::foldMemoryOperandCustom( in foldMemoryOperandCustom()
5556 MachineInstr *X86InstrInfo::foldMemoryOperandImpl( in foldMemoryOperandImpl()
5743 X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI, in foldMemoryOperandImpl()
6042 MachineInstr *X86InstrInfo::foldMemoryOperandImpl( in foldMemoryOperandImpl()
6307 bool X86InstrInfo::unfoldMemoryOperand( in unfoldMemoryOperand()
6453 X86InstrInfo::unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N, in unfoldMemoryOperand()
6584 unsigned X86InstrInfo::getOpcodeAfterMemoryUnfold(unsigned Opc, in getOpcodeAfterMemoryUnfold()
6602 X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, in areLoadsFromSameBasePtr()
6800 bool X86InstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, in shouldScheduleLoadsNear()
6848 bool X86InstrInfo::isSchedulingBoundary(const MachineInstr &MI, in isSchedulingBoundary()
6861 bool X86InstrInfo::
6869 bool X86InstrInfo::
6884 unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const { in getGlobalBaseReg()
7458 uint16_t X86InstrInfo::getExecutionDomainCustom(const MachineInstr &MI) const { in getExecutionDomainCustom()
7556 bool X86InstrInfo::setExecutionDomainCustom(MachineInstr &MI, in setExecutionDomainCustom()
7689 X86InstrInfo::getExecutionDomain(const MachineInstr &MI) const { in getExecutionDomain()
7729 void X86InstrInfo::setExecutionDomain(MachineInstr &MI, unsigned Domain) const { in setExecutionDomain()
7780 MCInst X86InstrInfo::getNop() const { in getNop()
7786 bool X86InstrInfo::isHighLatencyDef(int opc) const { in isHighLatencyDef()
8096 bool X86InstrInfo::hasHighOperandLatency(const TargetSchedModel &SchedModel, in hasHighOperandLatency()
8105 bool X86InstrInfo::hasReassociableOperands(const MachineInstr &Inst, in hasReassociableOperands()
8129 bool X86InstrInfo::isAssociativeAndCommutative(const MachineInstr &Inst) const { in isAssociativeAndCommutative()
8468 X86InstrInfo::describeLoadedValue(const MachineInstr &MI, Register Reg) const { in describeLoadedValue()
8611 void X86InstrInfo::setSpecialOperandAttr(MachineInstr &OldMI1, in setSpecialOperandAttr()
8657 X86InstrInfo::decomposeMachineOperandsTargetFlags(unsigned TF) const { in decomposeMachineOperandsTargetFlags()
8662 X86InstrInfo::getSerializableDirectMachineOperandTargetFlags() const { in getSerializableDirectMachineOperandTargetFlags()
8724 const X86InstrInfo *TII = STI.getInstrInfo(); in runOnMachineFunction()
8862 const X86InstrInfo *TII = STI.getInstrInfo(); in ReplaceTLSBaseAddrCall()
8882 const X86InstrInfo *TII = STI.getInstrInfo(); in SetRegister()
8949 outliner::OutlinedFunction X86InstrInfo::getOutliningCandidateInfo( in getOutliningCandidateInfo()
9013 bool X86InstrInfo::isFunctionSafeToOutlineFrom(MachineFunction &MF, in isFunctionSafeToOutlineFrom()
9036 X86InstrInfo::getOutliningType(MachineBasicBlock::iterator &MIT, unsigned Flags) const { in getOutliningType()
9095 void X86InstrInfo::buildOutlinedFrame(MachineBasicBlock &MBB, in buildOutlinedFrame()
9110 X86InstrInfo::insertOutlinedCall(Module &M, MachineBasicBlock &MBB, in insertOutlinedCall()