Lines Matching refs:ARM
30 namespace ARM { namespace
142 const RegisterBank &RBGPR = getRegBank(ARM::GPRRegBankID); in ARMRegisterBankInfo()
144 assert(&ARM::GPRRegBank == &RBGPR && "The order in RegBanks is messed up"); in ARMRegisterBankInfo()
147 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRRegClassID)) && in ARMRegisterBankInfo()
149 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRwithAPSRRegClassID)) && in ARMRegisterBankInfo()
151 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRnopcRegClassID)) && in ARMRegisterBankInfo()
153 assert(RBGPR.covers(*TRI.getRegClass(ARM::rGPRRegClassID)) && in ARMRegisterBankInfo()
155 assert(RBGPR.covers(*TRI.getRegClass(ARM::tGPRRegClassID)) && in ARMRegisterBankInfo()
157 assert(RBGPR.covers(*TRI.getRegClass(ARM::tcGPRRegClassID)) && in ARMRegisterBankInfo()
159 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRnoip_and_tcGPRRegClassID)) && in ARMRegisterBankInfo()
162 ARM::tGPREven_and_GPRnoip_and_tcGPRRegClassID)) && in ARMRegisterBankInfo()
164 assert(RBGPR.covers(*TRI.getRegClass(ARM::tGPROdd_and_tcGPRRegClassID)) && in ARMRegisterBankInfo()
169 ARM::checkPartialMappings(); in ARMRegisterBankInfo()
170 ARM::checkValueMappings(); in ARMRegisterBankInfo()
180 using namespace ARM; in getRegBankFromRegClass()
200 return getRegBank(ARM::GPRRegBankID); in getRegBankFromRegClass()
207 return getRegBank(ARM::FPRRegBankID); in getRegBankFromRegClass()
232 const ValueMapping *OperandsMapping = &ARM::ValueMappings[ARM::GPR3OpsIdx]; in getInstrMapping()
241 ? &ARM::ValueMappings[ARM::DPR3OpsIdx] in getInstrMapping()
242 : &ARM::ValueMappings[ARM::GPR3OpsIdx]; in getInstrMapping()
263 OperandsMapping = &ARM::ValueMappings[ARM::GPR3OpsIdx]; in getInstrMapping()
277 ? &ARM::ValueMappings[ARM::GPR3OpsIdx] in getInstrMapping()
278 : getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
279 &ARM::ValueMappings[ARM::DPR3OpsIdx]}); in getInstrMapping()
287 ? getOperandsMapping({&ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
288 &ARM::ValueMappings[ARM::GPR3OpsIdx]}) in getInstrMapping()
289 : &ARM::ValueMappings[ARM::GPR3OpsIdx]; in getInstrMapping()
299 ? &ARM::ValueMappings[ARM::DPR3OpsIdx] in getInstrMapping()
300 : &ARM::ValueMappings[ARM::SPR3OpsIdx]; in getInstrMapping()
307 ? getOperandsMapping({&ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
308 &ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
309 &ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
310 &ARM::ValueMappings[ARM::DPR3OpsIdx]}) in getInstrMapping()
311 : getOperandsMapping({&ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
312 &ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
313 &ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
314 &ARM::ValueMappings[ARM::SPR3OpsIdx]}); in getInstrMapping()
322 getOperandsMapping({&ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
323 &ARM::ValueMappings[ARM::SPR3OpsIdx]}); in getInstrMapping()
331 getOperandsMapping({&ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
332 &ARM::ValueMappings[ARM::DPR3OpsIdx]}); in getInstrMapping()
343 ? getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
344 &ARM::ValueMappings[ARM::DPR3OpsIdx]}) in getInstrMapping()
345 : getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
346 &ARM::ValueMappings[ARM::SPR3OpsIdx]}); in getInstrMapping()
357 ? getOperandsMapping({&ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
358 &ARM::ValueMappings[ARM::GPR3OpsIdx]}) in getInstrMapping()
359 : getOperandsMapping({&ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
360 &ARM::ValueMappings[ARM::GPR3OpsIdx]}); in getInstrMapping()
366 {Ty.getSizeInBits() == 64 ? &ARM::ValueMappings[ARM::DPR3OpsIdx] in getInstrMapping()
367 : &ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
375 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], nullptr}); in getInstrMapping()
385 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
386 &ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
387 &ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
388 &ARM::ValueMappings[ARM::GPR3OpsIdx]}); in getInstrMapping()
396 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], nullptr, in getInstrMapping()
397 &ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
398 &ARM::ValueMappings[ARM::GPR3OpsIdx]}); in getInstrMapping()
414 auto FPRValueMapping = Size == 32 ? &ARM::ValueMappings[ARM::SPR3OpsIdx] in getInstrMapping()
415 : &ARM::ValueMappings[ARM::DPR3OpsIdx]; in getInstrMapping()
417 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], nullptr, in getInstrMapping()
431 getOperandsMapping({&ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
432 &ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
433 &ARM::ValueMappings[ARM::GPR3OpsIdx]}); in getInstrMapping()
446 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
447 &ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
448 &ARM::ValueMappings[ARM::DPR3OpsIdx]}); in getInstrMapping()
456 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], nullptr}); in getInstrMapping()
465 OperandBanks[0] = Size == 64 ? &ARM::ValueMappings[ARM::DPR3OpsIdx] in getInstrMapping()
466 : &ARM::ValueMappings[ARM::GPR3OpsIdx]; in getInstrMapping()
479 (Mapping.RegBank->getID() != ARM::FPRRegBankID || in getInstrMapping()