195   auto DPPInst = BuildMI(*OrigMI.getParent(), OrigMI,  in createDPPInst()  local
203     DPPInst.add(*Dst);  in createDPPInst()
215       DPPInst.addReg(CombOldVGPR.Reg, Def ? 0 : RegState::Undef,  in createDPPInst()
231       DPPInst.addImm(Mod0->getImm());  in createDPPInst()
235       DPPInst.addImm(0);  in createDPPInst()
240     if (!TII->isOperandLegal(*DPPInst.getInstr(), NumOperands, Src0)) {  in createDPPInst()
245     DPPInst.add(*Src0);  in createDPPInst()
246     DPPInst->getOperand(NumOperands).setIsKill(false);  in createDPPInst()
254       DPPInst.addImm(Mod1->getImm());  in createDPPInst()
258       DPPInst.addImm(0);  in createDPPInst()
262       if (!TII->isOperandLegal(*DPPInst.getInstr(), NumOperands, Src1)) {  in createDPPInst()
267       DPPInst.add(*Src1);  in createDPPInst()
272       if (!TII->getNamedOperand(*DPPInst.getInstr(), AMDGPU::OpName::src2) ||  in createDPPInst()
273           !TII->isOperandLegal(*DPPInst.getInstr(), NumOperands, Src2)) {  in createDPPInst()
278       DPPInst.add(*Src2);  in createDPPInst()
281     DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::dpp_ctrl));  in createDPPInst()
282     DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::row_mask));  in createDPPInst()
283     DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::bank_mask));  in createDPPInst()
284     DPPInst.addImm(CombBCZ ? 1 : 0);  in createDPPInst()
288     DPPInst.getInstr()->eraseFromParent();  in createDPPInst()
291   LLVM_DEBUG(dbgs() << "  combined:  " << *DPPInst.getInstr());  in createDPPInst()
292   return DPPInst.getInstr();  in createDPPInst()
559       if (auto *DPPInst = createDPPInst(OrigMI, MovMI, CombOldVGPR,  in combineDPPMov()  local
561         DPPMIs.push_back(DPPInst);  in combineDPPMov()
571         if (auto *DPPInst =  in combineDPPMov()  local
574           DPPMIs.push_back(DPPInst);  in combineDPPMov()