Lines Matching refs:S32
438 const LLT S32 = LLT::scalar(32); in AMDGPULegalizerInfo() local
500 S32, S64 in AMDGPULegalizerInfo()
504 S32, S64, S16 in AMDGPULegalizerInfo()
508 S32, S64, S16, V2S16 in AMDGPULegalizerInfo()
511 const LLT MinScalarFPTy = ST.has16BitInsts() ? S16 : S32; in AMDGPULegalizerInfo()
514 getActionDefinitionsBuilder(G_BRCOND).legalFor({S1, S32}); in AMDGPULegalizerInfo()
519 .legalFor({S32, S64, V2S16, S16, V4S16, S1, S128, S256}) in AMDGPULegalizerInfo()
527 .clampMaxNumElements(0, S32, 16) in AMDGPULegalizerInfo()
534 .legalFor({S32, S16, V2S16}) in AMDGPULegalizerInfo()
535 .clampScalar(0, S16, S32) in AMDGPULegalizerInfo()
541 .legalFor({S32, S16, V2S16}) // Clamp modifier in AMDGPULegalizerInfo()
549 .legalFor({S32, S16}) in AMDGPULegalizerInfo()
550 .clampScalar(0, S16, S32) in AMDGPULegalizerInfo()
557 .legalFor({S32, S16}) // Clamp modifier in AMDGPULegalizerInfo()
571 .legalFor({S32}) in AMDGPULegalizerInfo()
572 .clampScalar(0, S32, S32) in AMDGPULegalizerInfo()
577 .legalFor({S32}) // Clamp modifier. in AMDGPULegalizerInfo()
579 .minScalarOrElt(0, S32) in AMDGPULegalizerInfo()
584 .minScalar(0, S32) in AMDGPULegalizerInfo()
592 .minScalar(0, S32) in AMDGPULegalizerInfo()
599 .customFor({S32, S64}) in AMDGPULegalizerInfo()
600 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
605 .legalFor({S32}) in AMDGPULegalizerInfo()
606 .maxScalarOrElt(0, S32); in AMDGPULegalizerInfo()
621 .legalFor({S32, S1, S64, V2S32, S16, V2S16, V4S16}) in AMDGPULegalizerInfo()
622 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
630 .legalFor({{S32, S1}, {S32, S32}}) in AMDGPULegalizerInfo()
631 .minScalar(0, S32) in AMDGPULegalizerInfo()
642 .legalFor({S1, S32, S64, S16, GlobalPtr, in AMDGPULegalizerInfo()
645 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
649 .legalFor({S32, S64, S16}) in AMDGPULegalizerInfo()
658 .clampScalarOrElt(0, S32, MaxScalar) in AMDGPULegalizerInfo()
660 .clampMaxNumElements(0, S32, 16); in AMDGPULegalizerInfo()
667 .legalFor({{PrivatePtr, S32}}); in AMDGPULegalizerInfo()
676 .legalFor({S32, S64}); in AMDGPULegalizerInfo()
678 .customFor({S32, S64}); in AMDGPULegalizerInfo()
680 .customFor({S32, S64}); in AMDGPULegalizerInfo()
707 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
716 .clampScalar(0, ST.has16BitInsts() ? S16 : S32, S64); in AMDGPULegalizerInfo()
720 .clampScalar(0, ST.has16BitInsts() ? S16 : S32, S64); in AMDGPULegalizerInfo()
724 .clampScalar(0, ST.has16BitInsts() ? S16 : S32, S64); in AMDGPULegalizerInfo()
734 .legalFor({S32, S64, S16}) in AMDGPULegalizerInfo()
739 .legalFor({S32, S64}) in AMDGPULegalizerInfo()
741 .clampScalar(0, S32, S64); in AMDGPULegalizerInfo()
746 .legalFor({S32, S64}) in AMDGPULegalizerInfo()
748 .clampScalar(0, S32, S64); in AMDGPULegalizerInfo()
751 .legalFor({S32, S64}) in AMDGPULegalizerInfo()
753 .clampScalar(0, S32, S64); in AMDGPULegalizerInfo()
758 .legalFor({{S32, S64}, {S16, S32}}) in AMDGPULegalizerInfo()
763 .legalFor({{S64, S32}, {S32, S16}}) in AMDGPULegalizerInfo()
764 .narrowScalarFor({{S64, S16}}, changeTo(0, S32)) in AMDGPULegalizerInfo()
769 .legalFor({S32}) in AMDGPULegalizerInfo()
773 .clampScalar(0, S32, S64); in AMDGPULegalizerInfo()
778 FMad.customFor({S32, S16}); in AMDGPULegalizerInfo()
780 FMad.customFor({S32}); in AMDGPULegalizerInfo()
788 FRem.customFor({S16, S32, S64}); in AMDGPULegalizerInfo()
790 FRem.minScalar(0, S32) in AMDGPULegalizerInfo()
791 .customFor({S32, S64}); in AMDGPULegalizerInfo()
807 .legalFor({{S64, S32}, {S32, S16}, {S64, S16}, in AMDGPULegalizerInfo()
808 {S32, S1}, {S64, S1}, {S16, S1}}) in AMDGPULegalizerInfo()
810 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
815 .legalFor({{S32, S32}, {S64, S32}, {S16, S32}}) in AMDGPULegalizerInfo()
816 .lowerFor({{S32, S64}}) in AMDGPULegalizerInfo()
821 IToFP.clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
822 .minScalar(0, S32) in AMDGPULegalizerInfo()
827 .legalFor({{S32, S32}, {S32, S64}, {S32, S16}}) in AMDGPULegalizerInfo()
828 .customFor({{S64, S32}, {S64, S64}}) in AMDGPULegalizerInfo()
829 .narrowScalarFor({{S64, S16}}, changeTo(0, S32)); in AMDGPULegalizerInfo()
833 FPToI.minScalar(1, S32); in AMDGPULegalizerInfo()
835 FPToI.minScalar(0, S32) in AMDGPULegalizerInfo()
847 .legalFor({S16, S32, S64}) in AMDGPULegalizerInfo()
852 .legalFor({S32, S64}) in AMDGPULegalizerInfo()
853 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
857 .legalFor({S32}) in AMDGPULegalizerInfo()
859 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
869 .legalIf(all(sameSize(0, 1), typeInSet(1, {S64, S32}))) in AMDGPULegalizerInfo()
886 {S1}, {S32, S64, GlobalPtr, LocalPtr, ConstantPtr, PrivatePtr, FlatPtr}) in AMDGPULegalizerInfo()
888 {S32}, {S32, S64, GlobalPtr, LocalPtr, ConstantPtr, PrivatePtr, FlatPtr}); in AMDGPULegalizerInfo()
895 .clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
897 .legalIf(all(typeInSet(0, {S1, S32}), isPointer(1))); in AMDGPULegalizerInfo()
902 .clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
908 Exp2Ops.legalFor({S32, S16}); in AMDGPULegalizerInfo()
910 Exp2Ops.legalFor({S32}); in AMDGPULegalizerInfo()
911 Exp2Ops.clampScalar(0, MinScalarFPTy, S32); in AMDGPULegalizerInfo()
916 ExpOps.customFor({{S32}, {S16}}); in AMDGPULegalizerInfo()
918 ExpOps.customFor({S32}); in AMDGPULegalizerInfo()
919 ExpOps.clampScalar(0, MinScalarFPTy, S32) in AMDGPULegalizerInfo()
923 .clampScalar(0, MinScalarFPTy, S32) in AMDGPULegalizerInfo()
928 .legalFor({{S32, S32}, {S32, S64}}) in AMDGPULegalizerInfo()
929 .clampScalar(0, S32, S32) in AMDGPULegalizerInfo()
930 .clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
940 .clampScalar(0, S32, S32) in AMDGPULegalizerInfo()
941 .clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
948 .legalFor({{S32, S32}, {S32, S64}}) in AMDGPULegalizerInfo()
949 .clampScalar(0, S32, S32) in AMDGPULegalizerInfo()
950 .clampScalar(1, S32, S64) in AMDGPULegalizerInfo()
958 .legalFor({S32, S64}) in AMDGPULegalizerInfo()
959 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
965 .legalFor({S16, S32, V2S16}) in AMDGPULegalizerInfo()
970 .clampScalar(0, S16, S32) in AMDGPULegalizerInfo()
975 .legalFor({S32, S16, V2S16}) in AMDGPULegalizerInfo()
984 .legalFor({S32, S16}) in AMDGPULegalizerInfo()
993 .legalFor({S32}) in AMDGPULegalizerInfo()
998 .maxScalar(0, S32) in AMDGPULegalizerInfo()
1003 .legalFor({S32}) in AMDGPULegalizerInfo()
1004 .minScalar(0, S32) in AMDGPULegalizerInfo()
1013 .legalForCartesianProduct(AddrSpaces32, {S32}) in AMDGPULegalizerInfo()
1029 .legalForCartesianProduct(AddrSpaces32, {S32}) in AMDGPULegalizerInfo()
1101 Actions.legalForTypesWithMemDesc({{S32, GlobalPtr, S32, GlobalAlign32}, in AMDGPULegalizerInfo()
1107 {S32, GlobalPtr, S8, GlobalAlign8}, in AMDGPULegalizerInfo()
1108 {S32, GlobalPtr, S16, GlobalAlign16}, in AMDGPULegalizerInfo()
1110 {S32, LocalPtr, S32, 32}, in AMDGPULegalizerInfo()
1113 {S32, LocalPtr, S8, 8}, in AMDGPULegalizerInfo()
1114 {S32, LocalPtr, S16, 16}, in AMDGPULegalizerInfo()
1115 {V2S16, LocalPtr, S32, 32}, in AMDGPULegalizerInfo()
1117 {S32, PrivatePtr, S32, 32}, in AMDGPULegalizerInfo()
1118 {S32, PrivatePtr, S8, 8}, in AMDGPULegalizerInfo()
1119 {S32, PrivatePtr, S16, 16}, in AMDGPULegalizerInfo()
1120 {V2S16, PrivatePtr, S32, 32}, in AMDGPULegalizerInfo()
1122 {S32, ConstantPtr, S32, GlobalAlign32}, in AMDGPULegalizerInfo()
1270 .minScalar(0, S32) in AMDGPULegalizerInfo()
1271 .narrowScalarIf(isWideScalarExtLoadTruncStore(0), changeTo(0, S32)) in AMDGPULegalizerInfo()
1279 .legalForTypesWithMemDesc({{S32, GlobalPtr, S8, 8}, in AMDGPULegalizerInfo()
1280 {S32, GlobalPtr, S16, 2 * 8}, in AMDGPULegalizerInfo()
1281 {S32, LocalPtr, S8, 8}, in AMDGPULegalizerInfo()
1282 {S32, LocalPtr, S16, 16}, in AMDGPULegalizerInfo()
1283 {S32, PrivatePtr, S8, 8}, in AMDGPULegalizerInfo()
1284 {S32, PrivatePtr, S16, 16}, in AMDGPULegalizerInfo()
1285 {S32, ConstantPtr, S8, 8}, in AMDGPULegalizerInfo()
1286 {S32, ConstantPtr, S16, 2 * 8}}) in AMDGPULegalizerInfo()
1294 {{S32, FlatPtr, S8, 8}, {S32, FlatPtr, S16, 16}}); in AMDGPULegalizerInfo()
1304 ExtLoads.clampScalar(0, S32, S32) in AMDGPULegalizerInfo()
1313 .legalFor({{S32, GlobalPtr}, {S32, LocalPtr}, in AMDGPULegalizerInfo()
1315 {S32, RegionPtr}, {S64, RegionPtr}}); in AMDGPULegalizerInfo()
1317 Atomics.legalFor({{S32, FlatPtr}, {S64, FlatPtr}}); in AMDGPULegalizerInfo()
1322 Atomic.legalFor({{S32, LocalPtr}, {S32, RegionPtr}}); in AMDGPULegalizerInfo()
1327 Atomic.legalFor({{S32, GlobalPtr}}); in AMDGPULegalizerInfo()
1332 .customFor({{S32, GlobalPtr}, {S64, GlobalPtr}, in AMDGPULegalizerInfo()
1333 {S32, FlatPtr}, {S64, FlatPtr}}) in AMDGPULegalizerInfo()
1334 .legalFor({{S32, LocalPtr}, {S64, LocalPtr}, in AMDGPULegalizerInfo()
1335 {S32, RegionPtr}, {S64, RegionPtr}}); in AMDGPULegalizerInfo()
1340 .legalForCartesianProduct({S32, S64, S16, V2S32, V2S16, V4S16, GlobalPtr, in AMDGPULegalizerInfo()
1344 {S1, S32}) in AMDGPULegalizerInfo()
1349 .clampMaxNumElements(0, S32, 2) in AMDGPULegalizerInfo()
1354 .legalIf(all(isPointer(0), typeInSet(1, {S1, S32}))); in AMDGPULegalizerInfo()
1359 .legalFor({{S32, S32}, {S64, S32}}); in AMDGPULegalizerInfo()
1378 Shifts.clampScalar(1, S32, S32); in AMDGPULegalizerInfo()
1390 Shifts.clampScalar(1, S32, S32); in AMDGPULegalizerInfo()
1391 Shifts.clampScalar(0, S32, S64); in AMDGPULegalizerInfo()
1395 .minScalar(0, S32) in AMDGPULegalizerInfo()
1436 .clampScalar(EltTypeIdx, S32, S64) in AMDGPULegalizerInfo()
1437 .clampScalar(VecTypeIdx, S32, S64) in AMDGPULegalizerInfo()
1438 .clampScalar(IdxTypeIdx, S32, S32) in AMDGPULegalizerInfo()
1439 .clampMaxNumElements(VecTypeIdx, S32, 32) in AMDGPULegalizerInfo()
1484 .legalForCartesianProduct(AllS32Vectors, {S32}) in AMDGPULegalizerInfo()
1495 .minScalar(1, S32); in AMDGPULegalizerInfo()
1498 .legalFor({V2S16, S32}) in AMDGPULegalizerInfo()
1500 BuildVector.minScalarOrElt(0, S32); in AMDGPULegalizerInfo()
1503 BuildVector.minScalarOrElt(0, S32); in AMDGPULegalizerInfo()
1506 .customFor({V2S16, S32}) in AMDGPULegalizerInfo()
1515 .clampMaxNumElements(0, S32, 32) in AMDGPULegalizerInfo()
1563 .clampScalar(LitTyIdx, S32, S512) in AMDGPULegalizerInfo()
1572 .clampScalar(BigTyIdx, S32, MaxScalar); in AMDGPULegalizerInfo()
1581 changeTo(LitTyIdx, S32)); in AMDGPULegalizerInfo()
1610 .legalFor({{S32}, {S64}}); in AMDGPULegalizerInfo()
1619 SextInReg.lowerFor({{S32}, {S64}, {S16}}); in AMDGPULegalizerInfo()
1623 SextInReg.lowerFor({{S32}, {S64}}); in AMDGPULegalizerInfo()
1628 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
1633 .legalFor({{S32, S32}}) in AMDGPULegalizerInfo()
1659 .minScalar(0, S32) in AMDGPULegalizerInfo()
1663 .legalFor({{S32, S32}, {S64, S32}}) in AMDGPULegalizerInfo()
1664 .clampScalar(1, S32, S32) in AMDGPULegalizerInfo()
1665 .clampScalar(0, S32, S64) in AMDGPULegalizerInfo()
1776 const LLT S32 = LLT::scalar(32); in getSegmentAperture() local
1799 MRI.setType(GetReg, S32); in getSegmentAperture()
1801 auto ShiftAmt = B.buildConstant(S32, WidthM1 + 1); in getSegmentAperture()
1802 return B.buildShl(S32, GetReg, ShiftAmt).getReg(0); in getSegmentAperture()
1826 return B.buildLoad(S32, LoadAddr, *MMO).getReg(0); in getSegmentAperture()
1834 const LLT S32 = LLT::scalar(32); in legalizeAddrSpaceCast() local
1914 Register SrcAsInt = B.buildPtrToInt(S32, Src).getReg(0); in legalizeAddrSpaceCast()
2000 LLT S32 = LLT::scalar(32); in extractF64Exponent() local
2002 auto Const0 = B.buildConstant(S32, FractBits - 32); in extractF64Exponent()
2003 auto Const1 = B.buildConstant(S32, ExpBits); in extractF64Exponent()
2005 auto ExpPart = B.buildIntrinsic(Intrinsic::amdgcn_ubfe, {S32}, false) in extractF64Exponent()
2010 return B.buildSub(S32, ExpPart, B.buildConstant(S32, 1023)); in extractF64Exponent()
2017 const LLT S32 = LLT::scalar(32); in legalizeIntrinsicTrunc() local
2024 auto Unmerge = B.buildUnmerge({S32, S32}, Src); in legalizeIntrinsicTrunc()
2034 const auto SignBitMask = B.buildConstant(S32, UINT32_C(1) << 31); in legalizeIntrinsicTrunc()
2035 auto SignBit = B.buildAnd(S32, Hi, SignBitMask); in legalizeIntrinsicTrunc()
2039 const auto Zero32 = B.buildConstant(S32, 0); in legalizeIntrinsicTrunc()
2047 auto FiftyOne = B.buildConstant(S32, FractBits - 1); in legalizeIntrinsicTrunc()
2066 const LLT S32 = LLT::scalar(32); in legalizeITOFP() local
2070 auto Unmerge = B.buildUnmerge({S32, S32}, Src); in legalizeITOFP()
2078 auto ThirtyTwo = B.buildConstant(S32, 32); in legalizeITOFP()
2100 const LLT S32 = LLT::scalar(32); in legalizeFPTOI() local
2103 assert((SrcLT == S32 || SrcLT == S64) && MRI.getType(Dst) == S64); in legalizeFPTOI()
2118 if (Signed && SrcLT == S32) { in legalizeFPTOI()
2124 Sign = B.buildAShr(S32, Src, B.buildConstant(S32, 31)); in legalizeFPTOI()
2125 Trunc = B.buildFAbs(S32, Trunc, Flags); in legalizeFPTOI()
2134 K0 = B.buildFConstant(S32, BitsToFloat(UINT32_C(/*2^-32*/ 0x2f800000))); in legalizeFPTOI()
2135 K1 = B.buildFConstant(S32, BitsToFloat(UINT32_C(/*-2^32*/ 0xcf800000))); in legalizeFPTOI()
2142 auto Hi = (Signed && SrcLT == S64) ? B.buildFPTOSI(S32, FloorMul) in legalizeFPTOI()
2143 : B.buildFPTOUI(S32, FloorMul); in legalizeFPTOI()
2144 auto Lo = B.buildFPTOUI(S32, Fma); in legalizeFPTOI()
2146 if (Signed && SrcLT == S32) { in legalizeFPTOI()
2399 LLT S32 = LLT::scalar(32); in legalizeGlobalValue() local
2401 B.buildIntrinsic(Intrinsic::amdgcn_groupstaticsize, {S32}, false); in legalizeGlobalValue()
2634 const LLT S32 = LLT::scalar(32); in legalizeFPow() local
2636 if (Ty == S32) { in legalizeFPow()
2637 auto Log = B.buildFLog2(S32, Src0, Flags); in legalizeFPow()
2638 auto Mul = B.buildIntrinsic(Intrinsic::amdgcn_fmul_legacy, {S32}, false) in legalizeFPow()
2646 auto Ext0 = B.buildFPExt(S32, Log, Flags); in legalizeFPow()
2647 auto Ext1 = B.buildFPExt(S32, Src1, Flags); in legalizeFPow()
2648 auto Mul = B.buildIntrinsic(Intrinsic::amdgcn_fmul_legacy, {S32}, false) in legalizeFPow()
2734 const LLT S32 = LLT::scalar(32); in legalizeBuildVector() local
2741 auto Merge = B.buildMerge(S32, {Src0, Src1}); in legalizeBuildVector()
2811 const LLT S32 = LLT::scalar(32); in loadInputValue() local
2818 auto ShiftAmt = B.buildConstant(S32, Shift); in loadInputValue()
2819 AndMaskSrc = B.buildLShr(S32, LiveIn, ShiftAmt).getReg(0); in loadInputValue()
2822 B.buildAnd(DstReg, AndMaskSrc, B.buildConstant(S32, Mask >> Shift)); in loadInputValue()
2860 LLT S32 = LLT::scalar(32); in legalizeFDIV() local
2865 if (DstTy == S32) in legalizeFDIV()
2879 const LLT S32 = LLT::scalar(32); in legalizeUnsignedDIV_REM32Impl() local
2885 auto FloatY = B.buildUITOFP(S32, Y); in legalizeUnsignedDIV_REM32Impl()
2886 auto RcpIFlag = B.buildInstr(AMDGPU::G_AMDGPU_RCP_IFLAG, {S32}, {FloatY}); in legalizeUnsignedDIV_REM32Impl()
2887 auto Scale = B.buildFConstant(S32, BitsToFloat(0x4f7ffffe)); in legalizeUnsignedDIV_REM32Impl()
2888 auto ScaledY = B.buildFMul(S32, RcpIFlag, Scale); in legalizeUnsignedDIV_REM32Impl()
2889 auto Z = B.buildFPTOUI(S32, ScaledY); in legalizeUnsignedDIV_REM32Impl()
2892 auto NegY = B.buildSub(S32, B.buildConstant(S32, 0), Y); in legalizeUnsignedDIV_REM32Impl()
2893 auto NegYZ = B.buildMul(S32, NegY, Z); in legalizeUnsignedDIV_REM32Impl()
2894 Z = B.buildAdd(S32, Z, B.buildUMulH(S32, Z, NegYZ)); in legalizeUnsignedDIV_REM32Impl()
2897 auto Q = B.buildUMulH(S32, X, Z); in legalizeUnsignedDIV_REM32Impl()
2898 auto R = B.buildSub(S32, X, B.buildMul(S32, Q, Y)); in legalizeUnsignedDIV_REM32Impl()
2901 auto One = B.buildConstant(S32, 1); in legalizeUnsignedDIV_REM32Impl()
2904 Q = B.buildSelect(S32, Cond, B.buildAdd(S32, Q, One), Q); in legalizeUnsignedDIV_REM32Impl()
2905 R = B.buildSelect(S32, Cond, B.buildSub(S32, R, Y), R); in legalizeUnsignedDIV_REM32Impl()
2910 B.buildSelect(DstDivReg, Cond, B.buildAdd(S32, Q, One), Q); in legalizeUnsignedDIV_REM32Impl()
2913 B.buildSelect(DstRemReg, Cond, B.buildSub(S32, R, Y), R); in legalizeUnsignedDIV_REM32Impl()
2931 const LLT S32 = LLT::scalar(32); in emitReciprocalU64() local
2932 auto Unmerge = B.buildUnmerge(S32, Val); in emitReciprocalU64()
2934 auto CvtLo = B.buildUITOFP(S32, Unmerge.getReg(0)); in emitReciprocalU64()
2935 auto CvtHi = B.buildUITOFP(S32, Unmerge.getReg(1)); in emitReciprocalU64()
2937 auto Mad = B.buildFMAD(S32, CvtHi, // 2**32 in emitReciprocalU64()
2938 B.buildFConstant(S32, BitsToFloat(0x4f800000)), CvtLo); in emitReciprocalU64()
2940 auto Rcp = B.buildInstr(AMDGPU::G_AMDGPU_RCP_IFLAG, {S32}, {Mad}); in emitReciprocalU64()
2942 B.buildFMul(S32, Rcp, B.buildFConstant(S32, BitsToFloat(0x5f7ffffc))); in emitReciprocalU64()
2946 B.buildFMul(S32, Mul1, B.buildFConstant(S32, BitsToFloat(0x2f800000))); in emitReciprocalU64()
2947 auto Trunc = B.buildIntrinsicTrunc(S32, Mul2); in emitReciprocalU64()
2950 auto Mad2 = B.buildFMAD(S32, Trunc, in emitReciprocalU64()
2951 B.buildFConstant(S32, BitsToFloat(0xcf800000)), Mul1); in emitReciprocalU64()
2953 auto ResultLo = B.buildFPTOUI(S32, Mad2); in emitReciprocalU64()
2954 auto ResultHi = B.buildFPTOUI(S32, Trunc); in emitReciprocalU64()
2964 const LLT S32 = LLT::scalar(32); in legalizeUnsignedDIV_REM64Impl() local
2979 auto UnmergeMulHi1 = B.buildUnmerge(S32, MulHi1); in legalizeUnsignedDIV_REM64Impl()
2983 auto Add1_Lo = B.buildUAddo(S32, S1, RcpLo, MulHi1_Lo); in legalizeUnsignedDIV_REM64Impl()
2984 auto Add1_Hi = B.buildUAdde(S32, S1, RcpHi, MulHi1_Hi, Add1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
2985 auto Add1_HiNc = B.buildAdd(S32, RcpHi, MulHi1_Hi); in legalizeUnsignedDIV_REM64Impl()
2990 auto UnmergeMulHi2 = B.buildUnmerge(S32, MulHi2); in legalizeUnsignedDIV_REM64Impl()
2994 auto Zero32 = B.buildConstant(S32, 0); in legalizeUnsignedDIV_REM64Impl()
2995 auto Add2_Lo = B.buildUAddo(S32, S1, Add1_Lo, MulHi2_Lo); in legalizeUnsignedDIV_REM64Impl()
2997 B.buildUAdde(S32, S1, Add1_HiNc, MulHi2_Hi, Add1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
2998 auto Add2_Hi = B.buildUAdde(S32, S1, Add2_HiC, Zero32, Add2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3001 auto UnmergeNumer = B.buildUnmerge(S32, Numer); in legalizeUnsignedDIV_REM64Impl()
3007 auto UnmergeMul3 = B.buildUnmerge(S32, Mul3); in legalizeUnsignedDIV_REM64Impl()
3010 auto Sub1_Lo = B.buildUSubo(S32, S1, NumerLo, Mul3_Lo); in legalizeUnsignedDIV_REM64Impl()
3011 auto Sub1_Hi = B.buildUSube(S32, S1, NumerHi, Mul3_Hi, Sub1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3012 auto Sub1_Mi = B.buildSub(S32, NumerHi, Mul3_Hi); in legalizeUnsignedDIV_REM64Impl()
3015 auto UnmergeDenom = B.buildUnmerge(S32, Denom); in legalizeUnsignedDIV_REM64Impl()
3020 auto C1 = B.buildSExt(S32, CmpHi); in legalizeUnsignedDIV_REM64Impl()
3023 auto C2 = B.buildSExt(S32, CmpLo); in legalizeUnsignedDIV_REM64Impl()
3026 auto C3 = B.buildSelect(S32, CmpEq, C2, C1); in legalizeUnsignedDIV_REM64Impl()
3033 auto Sub2_Lo = B.buildUSubo(S32, S1, Sub1_Lo, DenomLo); in legalizeUnsignedDIV_REM64Impl()
3034 auto Sub2_Mi = B.buildUSube(S32, S1, Sub1_Mi, DenomHi, Sub1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3035 auto Sub2_Hi = B.buildUSube(S32, S1, Sub2_Mi, Zero32, Sub2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3042 B.buildSExt(S32, B.buildICmp(CmpInst::ICMP_UGE, S1, Sub2_Hi, DenomHi)); in legalizeUnsignedDIV_REM64Impl()
3044 B.buildSExt(S32, B.buildICmp(CmpInst::ICMP_UGE, S1, Sub2_Lo, DenomLo)); in legalizeUnsignedDIV_REM64Impl()
3046 S32, B.buildICmp(CmpInst::ICMP_EQ, S1, Sub2_Hi, DenomHi), C5, C4); in legalizeUnsignedDIV_REM64Impl()
3050 auto Sub3_Lo = B.buildUSubo(S32, S1, Sub2_Lo, DenomLo); in legalizeUnsignedDIV_REM64Impl()
3052 auto Sub3_Mi = B.buildUSube(S32, S1, Sub2_Mi, DenomHi, Sub2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3053 auto Sub3_Hi = B.buildUSube(S32, S1, Sub3_Mi, Zero32, Sub3_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3097 const LLT S32 = LLT::scalar(32); in legalizeUnsignedDIV_REM() local
3103 if (Ty == S32) in legalizeUnsignedDIV_REM()
3118 const LLT S32 = LLT::scalar(32); in legalizeSignedDIV_REM() local
3121 if (Ty != S32 && Ty != S64) in legalizeSignedDIV_REM()
3128 auto SignBitOffset = B.buildConstant(S32, Ty.getSizeInBits() - 1); in legalizeSignedDIV_REM()
3161 if (Ty == S32) in legalizeSignedDIV_REM()
3281 LLT S32 = LLT::scalar(32); in legalizeFDIV16() local
3283 auto LHSExt = B.buildFPExt(S32, LHS, Flags); in legalizeFDIV16()
3284 auto RHSExt = B.buildFPExt(S32, RHS, Flags); in legalizeFDIV16()
3286 auto RCP = B.buildIntrinsic(Intrinsic::amdgcn_rcp, {S32}, false) in legalizeFDIV16()
3290 auto QUOT = B.buildFMul(S32, LHSExt, RCP, Flags); in legalizeFDIV16()
3347 LLT S32 = LLT::scalar(32); in legalizeFDIV32() local
3350 auto One = B.buildFConstant(S32, 1.0f); in legalizeFDIV32()
3353 B.buildIntrinsic(Intrinsic::amdgcn_div_scale, {S32, S1}, false) in legalizeFDIV32()
3359 B.buildIntrinsic(Intrinsic::amdgcn_div_scale, {S32, S1}, false) in legalizeFDIV32()
3365 auto ApproxRcp = B.buildIntrinsic(Intrinsic::amdgcn_rcp, {S32}, false) in legalizeFDIV32()
3368 auto NegDivScale0 = B.buildFNeg(S32, DenominatorScaled, Flags); in legalizeFDIV32()
3375 auto Fma0 = B.buildFMA(S32, NegDivScale0, ApproxRcp, One, Flags); in legalizeFDIV32()
3376 auto Fma1 = B.buildFMA(S32, Fma0, ApproxRcp, ApproxRcp, Flags); in legalizeFDIV32()
3377 auto Mul = B.buildFMul(S32, NumeratorScaled, Fma1, Flags); in legalizeFDIV32()
3378 auto Fma2 = B.buildFMA(S32, NegDivScale0, Mul, NumeratorScaled, Flags); in legalizeFDIV32()
3379 auto Fma3 = B.buildFMA(S32, Fma2, Fma1, Mul, Flags); in legalizeFDIV32()
3380 auto Fma4 = B.buildFMA(S32, NegDivScale0, Fma3, NumeratorScaled, Flags); in legalizeFDIV32()
3385 auto Fmas = B.buildIntrinsic(Intrinsic::amdgcn_div_fmas, {S32}, false) in legalizeFDIV32()
3450 LLT S32 = LLT::scalar(32); in legalizeFDIV64() local
3452 auto NumUnmerge = B.buildUnmerge(S32, LHS); in legalizeFDIV64()
3453 auto DenUnmerge = B.buildUnmerge(S32, RHS); in legalizeFDIV64()
3454 auto Scale0Unmerge = B.buildUnmerge(S32, DivScale0); in legalizeFDIV64()
3455 auto Scale1Unmerge = B.buildUnmerge(S32, DivScale1); in legalizeFDIV64()
3491 LLT S32 = LLT::scalar(32); in legalizeFDIVFastIntrin() local
3494 auto Abs = B.buildFAbs(S32, RHS, Flags); in legalizeFDIVFastIntrin()
3497 auto C0 = B.buildConstant(S32, 0x6f800000); in legalizeFDIVFastIntrin()
3498 auto C1 = B.buildConstant(S32, 0x2f800000); in legalizeFDIVFastIntrin()
3499 auto C2 = B.buildConstant(S32, FloatToBits(1.0f)); in legalizeFDIVFastIntrin()
3502 auto Sel = B.buildSelect(S32, CmpRes, C1, C2, Flags); in legalizeFDIVFastIntrin()
3504 auto Mul0 = B.buildFMul(S32, RHS, Sel, Flags); in legalizeFDIVFastIntrin()
3506 auto RCP = B.buildIntrinsic(Intrinsic::amdgcn_rcp, {S32}, false) in legalizeFDIVFastIntrin()
3510 auto Mul1 = B.buildFMul(S32, LHS, RCP, Flags); in legalizeFDIVFastIntrin()
3659 const LLT S32 = LLT::scalar(32); in splitBufferOffsets() local
3685 BaseReg = B.buildConstant(S32, Overflow).getReg(0); in splitBufferOffsets()
3687 auto OverflowVal = B.buildConstant(S32, Overflow); in splitBufferOffsets()
3688 BaseReg = B.buildAdd(S32, BaseReg, OverflowVal).getReg(0); in splitBufferOffsets()
3693 BaseReg = B.buildConstant(S32, 0).getReg(0); in splitBufferOffsets()
3729 const LLT S32 = LLT::scalar(32); in handleD16VData() local
3738 WideRegs.push_back(B.buildAnyExt(S32, Unmerge.getReg(I)).getReg(0)); in handleD16VData()
3742 return B.buildBuildVector(LLT::fixed_vector(NumElts, S32), WideRegs) in handleD16VData()
3749 Reg = B.buildBitcast(S32, Reg).getReg(0); in handleD16VData()
3751 PackedRegs.resize(2, B.buildUndef(S32).getReg(0)); in handleD16VData()
3752 return B.buildBuildVector(LLT::fixed_vector(2, S32), PackedRegs) in handleD16VData()
3763 return B.buildBitcast(LLT::fixed_vector(3, S32), Reg).getReg(0); in handleD16VData()
3768 Reg = B.buildBitcast(LLT::fixed_vector(2, S32), Reg).getReg(0); in handleD16VData()
3769 auto Unmerge = B.buildUnmerge(S32, Reg); in handleD16VData()
3772 PackedRegs.resize(4, B.buildUndef(S32).getReg(0)); in handleD16VData()
3773 return B.buildBuildVector(LLT::fixed_vector(4, S32), PackedRegs) in handleD16VData()
3815 const LLT S32 = LLT::scalar(32); in legalizeBufferStore() local
3836 VIndex = B.buildConstant(S32, 0).getReg(0); in legalizeBufferStore()
3901 const LLT S32 = LLT::scalar(32); in legalizeBufferLoad() local
3917 VIndex = B.buildConstant(S32, 0).getReg(0); in legalizeBufferLoad()
3969 LoadDstReg = B.getMRI()->createGenericVirtualRegister(S32); in legalizeBufferLoad()
3999 auto Unmerge = B.buildUnmerge(S32, LoadDstReg); in legalizeBufferLoad()
4205 const LLT S32 = LLT::scalar(32); in convertImageAddrToPacked() local
4212 assert(B.getMRI()->getType(SrcOp.getReg()) == S32); in convertImageAddrToPacked()
4221 auto Undef = B.buildUndef(S32); in convertImageAddrToPacked()
4266 const LLT S32 = LLT::scalar(32); in legalizeImageIntrinsic() local
4490 RegTy = S32; in legalizeImageIntrinsic()
4497 TFETy = LLT::fixed_vector(RoundedSize / 32 + 1, S32); in legalizeImageIntrinsic()
4498 RegTy = !IsTFE && EltSize == 16 ? V2S16 : S32; in legalizeImageIntrinsic()
4527 if (MRI->getType(Dst1Reg) != S32) in legalizeImageIntrinsic()
4534 if (Ty == S32) { in legalizeImageIntrinsic()
4756 const LLT S32 = LLT::scalar(32); in legalizeBVHIntrinsic() local
4783 auto Unmerge = B.buildUnmerge({S32, S32}, NodePtr); in legalizeBVHIntrinsic()
4791 auto packLanes = [&Ops, &S32, &B] (Register Src) { in legalizeBVHIntrinsic()
4792 auto Unmerge = B.buildUnmerge({S32, S32, S32, S32}, Src); in legalizeBVHIntrinsic()
4802 Register R1 = MRI.createGenericVirtualRegister(S32); in legalizeBVHIntrinsic()
4803 Register R2 = MRI.createGenericVirtualRegister(S32); in legalizeBVHIntrinsic()
4804 Register R3 = MRI.createGenericVirtualRegister(S32); in legalizeBVHIntrinsic()