Lines Matching refs:MO
62 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
208 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() argument
211 if (MO.isReg()) in getMachineOpValue()
212 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
214 assert(MO.isImm() && "did not expect relocated expression"); in getMachineOpValue()
215 return static_cast<unsigned>(MO.getImm()); in getMachineOpValue()
222 const MCOperand &MO = MI.getOperand(OpIdx); in getLdStUImm12OpValue() local
225 if (MO.isImm()) in getLdStUImm12OpValue()
226 ImmVal = static_cast<uint32_t>(MO.getImm()); in getLdStUImm12OpValue()
228 assert(MO.isExpr() && "unable to encode load/store imm operand"); in getLdStUImm12OpValue()
230 Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc())); in getLdStUImm12OpValue()
243 const MCOperand &MO = MI.getOperand(OpIdx); in getAdrLabelOpValue() local
246 if (MO.isImm()) in getAdrLabelOpValue()
247 return MO.getImm(); in getAdrLabelOpValue()
248 assert(MO.isExpr() && "Unexpected target type!"); in getAdrLabelOpValue()
249 const MCExpr *Expr = MO.getExpr(); in getAdrLabelOpValue()
270 const MCOperand &MO = MI.getOperand(OpIdx); in getAddSubImmOpValue() local
277 if (MO.isImm()) in getAddSubImmOpValue()
278 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << ShiftVal)); in getAddSubImmOpValue()
279 assert(MO.isExpr() && "Unable to encode MCOperand!"); in getAddSubImmOpValue()
280 const MCExpr *Expr = MO.getExpr(); in getAddSubImmOpValue()
305 const MCOperand &MO = MI.getOperand(OpIdx); in getCondBranchTargetOpValue() local
308 if (MO.isImm()) in getCondBranchTargetOpValue()
309 return MO.getImm(); in getCondBranchTargetOpValue()
310 assert(MO.isExpr() && "Unexpected target type!"); in getCondBranchTargetOpValue()
313 Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc())); in getCondBranchTargetOpValue()
327 const MCOperand &MO = MI.getOperand(OpIdx); in getLoadLiteralOpValue() local
330 if (MO.isImm()) in getLoadLiteralOpValue()
331 return MO.getImm(); in getLoadLiteralOpValue()
332 assert(MO.isExpr() && "Unexpected target type!"); in getLoadLiteralOpValue()
335 Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc())); in getLoadLiteralOpValue()
356 const MCOperand &MO = MI.getOperand(OpIdx); in getMoveWideImmOpValue() local
358 if (MO.isImm()) in getMoveWideImmOpValue()
359 return MO.getImm(); in getMoveWideImmOpValue()
360 assert(MO.isExpr() && "Unexpected movz/movk immediate"); in getMoveWideImmOpValue()
363 0, MO.getExpr(), MCFixupKind(AArch64::fixup_aarch64_movw), MI.getLoc())); in getMoveWideImmOpValue()
375 const MCOperand &MO = MI.getOperand(OpIdx); in getTestBranchTargetOpValue() local
378 if (MO.isImm()) in getTestBranchTargetOpValue()
379 return MO.getImm(); in getTestBranchTargetOpValue()
380 assert(MO.isExpr() && "Unexpected ADR target type!"); in getTestBranchTargetOpValue()
383 Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc())); in getTestBranchTargetOpValue()
397 const MCOperand &MO = MI.getOperand(OpIdx); in getBranchTargetOpValue() local
400 if (MO.isImm()) in getBranchTargetOpValue()
401 return MO.getImm(); in getBranchTargetOpValue()
402 assert(MO.isExpr() && "Unexpected ADR target type!"); in getBranchTargetOpValue()
407 Fixups.push_back(MCFixup::create(0, MO.getExpr(), Kind, MI.getLoc())); in getBranchTargetOpValue()
425 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShifterOpValue() local
426 assert(MO.isImm() && "Expected an immediate value for the shift amount!"); in getVecShifterOpValue()
428 switch (MO.getImm()) { in getVecShifterOpValue()
449 const MCOperand &MO = MI.getOperand(OpIdx); in getFixedPointScaleOpValue() local
450 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getFixedPointScaleOpValue()
451 return 64 - MO.getImm(); in getFixedPointScaleOpValue()
458 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftR64OpValue() local
459 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getVecShiftR64OpValue()
460 return 64 - MO.getImm(); in getVecShiftR64OpValue()
467 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftR32OpValue() local
468 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getVecShiftR32OpValue()
469 return 32 - MO.getImm(); in getVecShiftR32OpValue()
476 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftR16OpValue() local
477 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getVecShiftR16OpValue()
478 return 16 - MO.getImm(); in getVecShiftR16OpValue()
485 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftR8OpValue() local
486 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getVecShiftR8OpValue()
487 return 8 - MO.getImm(); in getVecShiftR8OpValue()
494 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftL64OpValue() local
495 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getVecShiftL64OpValue()
496 return MO.getImm() - 64; in getVecShiftL64OpValue()
503 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftL32OpValue() local
504 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getVecShiftL32OpValue()
505 return MO.getImm() - 32; in getVecShiftL32OpValue()
512 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftL16OpValue() local
513 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getVecShiftL16OpValue()
514 return MO.getImm() - 16; in getVecShiftL16OpValue()
521 const MCOperand &MO = MI.getOperand(OpIdx); in getVecShiftL8OpValue() local
522 assert(MO.isImm() && "Expected an immediate value for the scale amount!"); in getVecShiftL8OpValue()
523 return MO.getImm() - 8; in getVecShiftL8OpValue()
566 const MCOperand &MO = MI.getOperand(OpIdx); in getSVEIncDecImm() local
567 assert(MO.isImm() && "Expected an immediate value!"); in getSVEIncDecImm()
569 return MO.getImm() - 1; in getSVEIncDecImm()
577 const MCOperand &MO = MI.getOperand(OpIdx); in getMoveVecShifterOpValue() local
578 assert(MO.isImm() && in getMoveVecShifterOpValue()
580 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue()