Lines Matching refs:cl
52 static cl::opt<bool> EnableCCMP("aarch64-enable-ccmp",
53 cl::desc("Enable the CCMP formation pass"),
54 cl::init(true), cl::Hidden);
56 static cl::opt<bool>
58 cl::desc("Enable the conditional branch tuning pass"),
59 cl::init(true), cl::Hidden);
61 static cl::opt<bool> EnableMCR("aarch64-enable-mcr",
62 cl::desc("Enable the machine combiner pass"),
63 cl::init(true), cl::Hidden);
65 static cl::opt<bool> EnableStPairSuppress("aarch64-enable-stp-suppress",
66 cl::desc("Suppress STP for AArch64"),
67 cl::init(true), cl::Hidden);
69 static cl::opt<bool> EnableAdvSIMDScalar(
71 cl::desc("Enable use of AdvSIMD scalar integer instructions"),
72 cl::init(false), cl::Hidden);
74 static cl::opt<bool>
76 cl::desc("Enable the promote constant pass"),
77 cl::init(true), cl::Hidden);
79 static cl::opt<bool> EnableCollectLOH(
81 cl::desc("Enable the pass that emits the linker optimization hints (LOH)"),
82 cl::init(true), cl::Hidden);
84 static cl::opt<bool>
85 EnableDeadRegisterElimination("aarch64-enable-dead-defs", cl::Hidden,
86 cl::desc("Enable the pass that removes dead"
90 cl::init(true));
92 static cl::opt<bool> EnableRedundantCopyElimination(
94 cl::desc("Enable the redundant copy elimination pass"), cl::init(true),
95 cl::Hidden);
97 static cl::opt<bool> EnableLoadStoreOpt("aarch64-enable-ldst-opt",
98 cl::desc("Enable the load/store pair"
100 cl::init(true), cl::Hidden);
102 static cl::opt<bool> EnableAtomicTidy(
103 "aarch64-enable-atomic-cfg-tidy", cl::Hidden,
104 cl::desc("Run SimplifyCFG after expanding atomic operations"
106 cl::init(true));
108 static cl::opt<bool>
109 EnableEarlyIfConversion("aarch64-enable-early-ifcvt", cl::Hidden,
110 cl::desc("Run early if-conversion"),
111 cl::init(true));
113 static cl::opt<bool>
115 cl::desc("Enable the condition optimizer pass"),
116 cl::init(true), cl::Hidden);
118 static cl::opt<bool>
119 EnableA53Fix835769("aarch64-fix-cortex-a53-835769", cl::Hidden,
120 cl::desc("Work around Cortex-A53 erratum 835769"),
121 cl::init(false));
123 static cl::opt<bool>
124 EnableGEPOpt("aarch64-enable-gep-opt", cl::Hidden,
125 cl::desc("Enable optimizations on complex GEPs"),
126 cl::init(false));
128 static cl::opt<bool>
129 BranchRelaxation("aarch64-enable-branch-relax", cl::Hidden, cl::init(true),
130 cl::desc("Relax out of range conditional branches"));
132 static cl::opt<bool> EnableCompressJumpTables(
133 "aarch64-enable-compress-jump-tables", cl::Hidden, cl::init(true),
134 cl::desc("Use smallest entry possible for jump tables"));
137 static cl::opt<cl::boolOrDefault>
138 EnableGlobalMerge("aarch64-enable-global-merge", cl::Hidden,
139 cl::desc("Enable the global merge pass"));
141 static cl::opt<bool>
142 EnableLoopDataPrefetch("aarch64-enable-loop-data-prefetch", cl::Hidden,
143 cl::desc("Enable the loop data prefetch pass"),
144 cl::init(true));
146 static cl::opt<int> EnableGlobalISelAtO(
147 "aarch64-enable-global-isel-at-O", cl::Hidden,
148 cl::desc("Enable GlobalISel at or below an opt level (-1 to disable)"),
149 cl::init(0));
151 static cl::opt<bool>
152 EnableSVEIntrinsicOpts("aarch64-enable-sve-intrinsic-opts", cl::Hidden,
153 cl::desc("Enable SVE intrinsic opts"),
154 cl::init(true));
156 static cl::opt<bool> EnableFalkorHWPFFix("aarch64-enable-falkor-hwpf-fix",
157 cl::init(true), cl::Hidden);
159 static cl::opt<bool>
160 EnableBranchTargets("aarch64-enable-branch-targets", cl::Hidden,
161 cl::desc("Enable the AArch64 branch target pass"),
162 cl::init(true));
164 static cl::opt<unsigned> SVEVectorBitsMaxOpt(
166 cl::desc("Assume SVE vector registers are at most this big, "
168 cl::init(0), cl::Hidden);
170 static cl::opt<unsigned> SVEVectorBitsMinOpt(
172 cl::desc("Assume SVE vector registers are at least this big, "
174 cl::init(0), cl::Hidden);
176 extern cl::opt<bool> EnableHomogeneousPrologEpilog;
577 EnableGlobalMerge == cl::BOU_UNSET) || in addPreISel()
578 EnableGlobalMerge == cl::BOU_TRUE) { in addPreISel()
580 (EnableGlobalMerge == cl::BOU_UNSET); in addPreISel()