Lines Matching refs:getConstant
1701 TLO.DAG.getConstant(NewImm, DL, VT)); in optimizeLogicalImm()
2620 SDValue Condition = DAG.getConstant(Predicate, DL, MVT_CC); in emitConditionalComparison()
2623 SDValue NZCVOp = DAG.getConstant(NZCV, DL, MVT::i32); in emitConditionalComparison()
2882 RHS = DAG.getConstant(C, dl, VT); in getAArch64Cmp()
2892 RHS = DAG.getConstant(C, dl, VT); in getAArch64Cmp()
2903 RHS = DAG.getConstant(C, dl, VT); in getAArch64Cmp()
2914 RHS = DAG.getConstant(C, dl, VT); in getAArch64Cmp()
2971 Cmp = emitComparison(SExt, DAG.getConstant(ValueofRHS, dl, in getAArch64Cmp()
2990 AArch64cc = DAG.getConstant(AArch64CC, dl, MVT_CC); in getAArch64Cmp()
3044 SDValue UpperBits = DAG.getConstant(0xFFFFFFFF00000000, DL, MVT::i64); in getAArch64XALUOOp()
3056 DAG.getConstant(63, DL, MVT::i64)); in getAArch64XALUOOp()
3067 DAG.getConstant(0, DL, MVT::i64), in getAArch64XALUOOp()
3104 SDValue TVal = DAG.getConstant(1, dl, MVT::i32); in LowerXOR()
3105 SDValue FVal = DAG.getConstant(0, dl, MVT::i32); in LowerXOR()
3109 SDValue CCVal = DAG.getConstant(getInvertedCondCode(CC), dl, MVT::i32); in LowerXOR()
3158 DAG.getConstant(-1ULL, dl, Other.getValueType())); in LowerXOR()
3215 SDValue TVal = DAG.getConstant(1, dl, MVT::i32); in LowerXALUO()
3216 SDValue FVal = DAG.getConstant(0, dl, MVT::i32); in LowerXALUO()
3221 SDValue CCVal = DAG.getConstant(getInvertedCondCode(CC), dl, MVT::i32); in LowerXALUO()
3257 DAG.getConstant(PrfOp, DL, MVT::i32), Op.getOperand(1)); in LowerPREFETCH()
3642 Ops.push_back(DAG.getConstant(CInt.zextOrTrunc(32), dl, MVT::i32)); in skipExtensionForVectorMULL()
3692 {Chain, DAG.getConstant(Intrinsic::aarch64_get_fpcr, dl, MVT::i64)}); in LowerFLT_ROUNDS_()
3696 DAG.getConstant(1U << 22, dl, MVT::i32)); in LowerFLT_ROUNDS_()
3698 DAG.getConstant(22, dl, MVT::i32)); in LowerFLT_ROUNDS_()
3700 DAG.getConstant(3, dl, MVT::i32)); in LowerFLT_ROUNDS_()
3721 DAG.getConstant(1, DL, MVT::i32)); in LowerSET_ROUNDING()
3723 DAG.getConstant(0x3, DL, MVT::i32)); in LowerSET_ROUNDING()
3726 DAG.getConstant(AArch64::RoundingBitsPos, DL, MVT::i32)); in LowerSET_ROUNDING()
3740 DAG.getConstant(RMMask, DL, MVT::i64)); in LowerSET_ROUNDING()
4305 auto ConstOffset = DAG.getConstant(OffsetVal, SDLoc(Index), MVT::i64); in selectGatherScatterAddrMode()
4558 Trunc, DAG.getConstant(0, DL, MVT::i64)); in LowerTruncateVectorStore()
4608 StoreNode->getValue(), DAG.getConstant(0, Dl, MVT::i64)); in LowerSTORE()
4613 DAG.getConstant(EC.getKnownMinValue() / 2, Dl, MVT::i64)); in LowerSTORE()
4624 DAG.getConstant(0, Dl, MVT::i64)); in LowerSTORE()
4627 DAG.getConstant(1, Dl, MVT::i64)); in LowerSTORE()
4641 Value, DAG.getConstant(i, Dl, MVT::i32)); in LowerSTORE()
4643 DAG.getConstant(i * 8, Dl, PtrVT)); in LowerSTORE()
4666 DAG.getConstant(i * 8, DL, PtrVT)); in LowerLOAD()
4700 DAG.getConstant(0, DL, MVT::i64)); in LowerLOAD()
4714 SDValue Neg = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), in LowerABS()
4719 Op.getOperand(0), DAG.getConstant(0, DL, VT)); in LowerABS()
4721 DAG.getConstant(AArch64CC::PL, DL, MVT::i32), in LowerABS()
5200 DAG.getConstant(32, DL, RegVT)); in LowerFormalArguments()
5421 DAG.getNode(ISD::ADD, DL, PtrVT, FIN, DAG.getConstant(8, DL, PtrVT)); in saveVarArgRegisters()
5450 DAG.getConstant(16, DL, PtrVT)); in saveVarArgRegisters()
5511 DAG.getConstant(32, DL, VA.getLocVT())); in LowerCallResult()
5939 DAG.getConstant(32, DL, VA.getLocVT())); in LowerCall()
6083 DAG.getConstant(Outs[i].Flags.getByValSize(), DL, MVT::i64); in LowerCall()
6295 DAG.getConstant(32, DL, VA.getLocVT())); in LowerReturn()
6799 DAG.getConstant(3, DL, PtrVT)); in LowerWindowsGlobalTLSAddress()
6878 RHS = DAG.getConstant(0, dl, LHS.getValueType()); in LowerBR_CC()
6898 SDValue CCVal = DAG.getConstant(OFCC, dl, MVT::i32); in LowerBR_CC()
6923 DAG.getConstant(Log2_64(Mask), dl, MVT::i64), in LowerBR_CC()
6939 DAG.getConstant(Log2_64(Mask), dl, MVT::i64), in LowerBR_CC()
6951 DAG.getConstant(SignBitPos, dl, MVT::i64), Dest); in LowerBR_CC()
6962 DAG.getConstant(SignBitPos, dl, MVT::i64), Dest); in LowerBR_CC()
6979 SDValue CC1Val = DAG.getConstant(CC1, dl, MVT::i32); in LowerBR_CC()
6983 SDValue CC2Val = DAG.getConstant(CC2, dl, MVT::i32); in LowerBR_CC()
7042 SDValue BuildVec = DAG.getConstant(EltMask, DL, VecVT); in LowerFCOPYSIGN()
7093 DAG.getConstant(Intrinsic::aarch64_neon_uaddlv, DL, MVT::i32), CtPop); in LowerCTPOP()
7104 DAG.getConstant(Intrinsic::aarch64_neon_uaddlv, DL, MVT::i32), CtPop); in LowerCTPOP()
7129 DAG.getConstant(Intrinsic::aarch64_neon_uaddlp, DL, MVT::i32), Val); in LowerCTPOP()
7213 SDValue TVal = DAG.getConstant(1, dl, VT); in LowerSETCC()
7214 SDValue FVal = DAG.getConstant(0, dl, VT); in LowerSETCC()
7260 SDValue CC1Val = DAG.getConstant(CC1, dl, MVT::i32); in LowerSETCC()
7273 SDValue CC1Val = DAG.getConstant(CC1, dl, MVT::i32); in LowerSETCC()
7277 SDValue CC2Val = DAG.getConstant(CC2, dl, MVT::i32); in LowerSETCC()
7295 RHS = DAG.getConstant(0, dl, LHS.getValueType()); in LowerSELECT_CC()
7323 DAG.getConstant(VT.getSizeInBits() - 1, dl, VT)); in LowerSELECT_CC()
7324 return DAG.getNode(ISD::OR, dl, VT, Shift, DAG.getConstant(1, dl, VT)); in LowerSELECT_CC()
7430 FVal = DAG.getConstant(0, dl, FVal.getValueType()); in LowerSELECT_CC()
7471 SDValue CC1Val = DAG.getConstant(CC1, dl, MVT::i32); in LowerSELECT_CC()
7477 SDValue CC2Val = DAG.getConstant(CC2, dl, MVT::i32); in LowerSELECT_CC()
7542 SDValue CCVal = DAG.getConstant(OFCC, DL, MVT::i32); in LowerSELECT()
7557 RHS = DAG.getConstant(0, DL, CCVal.getValueType()); in LowerSELECT()
7685 DAG.getConstant(Offset, DL, PtrVT)); in LowerAAPCS_VASTART()
7689 DAG.getConstant(GPRSize, DL, PtrVT)); in LowerAAPCS_VASTART()
7703 DAG.getConstant(Offset, DL, PtrVT)); in LowerAAPCS_VASTART()
7707 DAG.getConstant(FPRSize, DL, PtrVT)); in LowerAAPCS_VASTART()
7718 DAG.getConstant(Offset, DL, PtrVT)); in LowerAAPCS_VASTART()
7720 DAG.getStore(Chain, DL, DAG.getConstant(-GPRSize, DL, MVT::i32), in LowerAAPCS_VASTART()
7726 DAG.getConstant(Offset, DL, PtrVT)); in LowerAAPCS_VASTART()
7728 DAG.getStore(Chain, DL, DAG.getConstant(-FPRSize, DL, MVT::i32), in LowerAAPCS_VASTART()
7760 DAG.getConstant(VaListSize, DL, MVT::i32), in LowerVACOPY()
7789 DAG.getConstant(Align->value() - 1, DL, PtrVT)); in LowerVAARG()
7791 DAG.getConstant(-(int64_t)Align->value(), DL, PtrVT)); in LowerVAARG()
7811 DAG.getConstant(ArgSize, DL, PtrVT)); in LowerVAARG()
7894 SDValue Offset = DAG.getConstant(8, DL, getPointerTy(DAG.getDataLayout())); in LowerADDROFRETURNADDR()
7911 SDValue Offset = DAG.getConstant(8, DL, getPointerTy(DAG.getDataLayout())); in LowerRETURNADDR()
8497 V64Reg, DAG.getConstant(0, DL, MVT::i64)); in WidenVector()
8646 DAG.getConstant(NumSrcElts, dl, MVT::i64)); in ReconstructShuffle()
8652 DAG.getConstant(0, dl, MVT::i64)); in ReconstructShuffle()
8657 DAG.getConstant(0, dl, MVT::i64)); in ReconstructShuffle()
8660 DAG.getConstant(NumSrcElts, dl, MVT::i64)); in ReconstructShuffle()
8672 DAG.getConstant(Imm, dl, MVT::i32)); in ReconstructShuffle()
9095 DAG.getConstant(0, DL, MVT::i64)); in tryFormConcatFromShuffle()
9099 DAG.getConstant(0, DL, MVT::i64)); in tryFormConcatFromShuffle()
9178 SDValue Lane = DAG.getConstant(OpNum - OP_VDUP0, dl, MVT::i64); in GeneratePerfectShuffle()
9186 DAG.getConstant(Imm, dl, MVT::i32)); in GeneratePerfectShuffle()
9223 TBLMask.push_back(DAG.getConstant(Offset, DL, MVT::i32)); in GenerateTBL()
9243 DAG.getConstant(Intrinsic::aarch64_neon_tbl1, DL, MVT::i32), V1Cst, in GenerateTBL()
9251 DAG.getConstant(Intrinsic::aarch64_neon_tbl1, DL, MVT::i32), V1Cst, in GenerateTBL()
9263 DAG.getConstant(Intrinsic::aarch64_neon_tbl2, DL, MVT::i32), V1Cst, in GenerateTBL()
9335 return DAG.getNode(Opcode, dl, VT, V, DAG.getConstant(Lane, dl, MVT::i64)); in constructDup()
9412 DAG.getConstant(8, dl, MVT::i32)); in LowerVECTOR_SHUFFLE()
9422 DAG.getConstant(Imm, dl, MVT::i32)); in LowerVECTOR_SHUFFLE()
9426 DAG.getConstant(Imm, dl, MVT::i32)); in LowerVECTOR_SHUFFLE()
9464 SDValue DstLaneV = DAG.getConstant(Anomaly, dl, MVT::i64); in LowerVECTOR_SHUFFLE()
9472 SDValue SrcLaneV = DAG.getConstant(SrcLane, dl, MVT::i64); in LowerVECTOR_SHUFFLE()
9539 DAG.getConstant(0, dl, MVT::i64), SplatVal); in LowerSPLAT_VECTOR()
9591 SDValue One = DAG.getConstant(1, DL, MVT::i64); in LowerDUPQLane()
9644 DAG.getConstant(Value, dl, MVT::i32)); in tryAdvSIMDModImm64()
9686 DAG.getConstant(Value, dl, MVT::i32), in tryAdvSIMDModImm32()
9687 DAG.getConstant(Shift, dl, MVT::i32)); in tryAdvSIMDModImm32()
9690 DAG.getConstant(Value, dl, MVT::i32), in tryAdvSIMDModImm32()
9691 DAG.getConstant(Shift, dl, MVT::i32)); in tryAdvSIMDModImm32()
9726 DAG.getConstant(Value, dl, MVT::i32), in tryAdvSIMDModImm16()
9727 DAG.getConstant(Shift, dl, MVT::i32)); in tryAdvSIMDModImm16()
9730 DAG.getConstant(Value, dl, MVT::i32), in tryAdvSIMDModImm16()
9731 DAG.getConstant(Shift, dl, MVT::i32)); in tryAdvSIMDModImm16()
9762 DAG.getConstant(Value, dl, MVT::i32), in tryAdvSIMDModImm321s()
9763 DAG.getConstant(Shift, dl, MVT::i32)); in tryAdvSIMDModImm321s()
9784 DAG.getConstant(Value, dl, MVT::i32)); in tryAdvSIMDModImm8()
9815 DAG.getConstant(Value, dl, MVT::i32)); in tryAdvSIMDModImmFP()
10010 Lane = DAG.getConstant(LowBits.getZExtValue(), dl, MVT::i32); in NormalizeBuildVector()
10203 DAG.getConstant(0, dl, MVT::i64)); in LowerBUILD_VECTOR()
10206 DAG.getConstant(NumElts, dl, MVT::i64)); in LowerBUILD_VECTOR()
10290 SDValue LaneIdx = DAG.getConstant(i, dl, MVT::i64); in LowerBUILD_VECTOR()
10322 Op.getOperand(I), DAG.getConstant(I, dl, MVT::i64)); in LowerBUILD_VECTOR()
10363 SDValue LaneIdx = DAG.getConstant(i, dl, MVT::i64); in LowerBUILD_VECTOR()
10698 SDValue Zero = DAG.getConstant(0, dl, OpVT); in LowerTRUNCATE()
10699 SDValue One = DAG.getConstant(1, dl, OpVT); in LowerTRUNCATE()
10733 DAG.getConstant(Cnt, DL, MVT::i32)); in LowerVectorSRA_SRL_SHL()
10735 DAG.getConstant(Intrinsic::aarch64_neon_ushl, DL, in LowerVectorSRA_SRL_SHL()
10751 DAG.getConstant(Cnt, DL, MVT::i32)); in LowerVectorSRA_SRL_SHL()
10760 SDValue NegShift = DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), in LowerVectorSRA_SRL_SHL()
10764 DAG.getConstant(Opc, DL, MVT::i32), Op.getOperand(0), in LowerVectorSRA_SRL_SHL()
10942 DAG.getConstant(0, DL, MVT::i64)); in getReductionSDNode()
11007 DAG.getConstant(Intrinsic::aarch64_neon_fmaxnmv, dl, MVT::i32), in LowerVECREDUCE()
11013 DAG.getConstant(Intrinsic::aarch64_neon_fminnmv, dl, MVT::i32), in LowerVECREDUCE()
11032 RHS = DAG.getNode(ISD::SUB, dl, VT, DAG.getConstant(0, dl, VT), RHS); in LowerATOMIC_LOAD_SUB()
11049 RHS = DAG.getNode(ISD::XOR, dl, VT, DAG.getConstant(-1ULL, dl, VT), RHS); in LowerATOMIC_LOAD_AND()
11067 DAG.getConstant(4, dl, MVT::i64)); in LowerWindowsDYNAMIC_STACKALLOC()
11079 DAG.getConstant(4, dl, MVT::i64)); in LowerWindowsDYNAMIC_STACKALLOC()
11104 DAG.getConstant(-(uint64_t)Align->value(), dl, VT)); in LowerDYNAMIC_STACKALLOC()
11119 DAG.getConstant(-(uint64_t)Align->value(), dl, VT)); in LowerDYNAMIC_STACKALLOC()
12326 DAG.getConstant(8, DL, MVT::i64)); in performVecReduceAddCombineWithUADDLP()
12329 DAG.getConstant(8, DL, MVT::i64)); in performVecReduceAddCombineWithUADDLP()
12337 DAG.getConstant(0, DL, MVT::i64)); in performVecReduceAddCombineWithUADDLP()
12340 DAG.getConstant(0, DL, MVT::i64)); in performVecReduceAddCombineWithUADDLP()
12388 B = DAG.getConstant(1, DL, Op0VT); in performVecReduceAddCombine()
12393 DAG.getConstant(0, DL, Op0VT == MVT::v8i8 ? MVT::v2i32 : MVT::v4i32); in performVecReduceAddCombine()
12427 SDValue Zero = DAG.getConstant(0, DL, VT); in BuildSDIVPow2()
12428 SDValue Pow2MinusOne = DAG.getConstant((1ULL << Lg2) - 1, DL, VT); in BuildSDIVPow2()
12442 DAG.getNode(ISD::SRA, DL, VT, CSel, DAG.getConstant(Lg2, DL, MVT::i64)); in BuildSDIVPow2()
12450 return DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), SRA); in BuildSDIVPow2()
12576 DAG.getConstant(0, DL, MVT::i64)); in performCommonVectorExtendCombine()
12706 DAG.getConstant(ShiftAmt, DL, MVT::i64)); in performMulCombine()
12715 return DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), Res); in performMulCombine()
12719 DAG.getConstant(TrailingZeroes, DL, MVT::i64)); in performMulCombine()
12874 DAG.getConstant(IntrinsicOpcode, DL, MVT::i32), in performFpToIntCombine()
12875 Op->getOperand(0), DAG.getConstant(C, DL, MVT::i32)); in performFpToIntCombine()
12948 DAG.getConstant(IntrinsicOpcode, DL, MVT::i32), ConvInput, in performFDivCombine()
12949 DAG.getConstant(C, DL, MVT::i32)); in performFDivCombine()
13013 DAG.getConstant(ShiftRHS, DL, MVT::i64)); in tryCombineToEXTR()
13187 DAG.getConstant(Mask.zextOrTrunc(32), DL, MVT::i32)); in performSVEAndCombine()
13444 DAG.getConstant(0, DL, MVT::i64)), in performExtractVectorEltCombine()
13446 DAG.getConstant(1, DL, MVT::i64))); in performExtractVectorEltCombine()
13551 DAG.getConstant(0, dl, MVT::i64)); in performConcatVectorsCombine()
13676 DAG.getConstant(NumElems, dl, MVT::i64)); in tryExtendDUPToExtractHigh()
13810 CCVal = DAG.getConstant( in performSetccAddFolding()
13821 LHS = DAG.getNode(ISD::ADD, dl, VT, RHS, DAG.getConstant(1, dl, VT)); in performSetccAddFolding()
13859 DAG.getConstant(0, DL, MVT::i64)); in performUADDVCombine()
14047 DAG.getConstant(-ShiftAmount, dl, MVT::i32)); in tryCombineShiftImm()
14051 DAG.getConstant(ShiftAmount, dl, MVT::i32)); in tryCombineShiftImm()
14080 DAG.getConstant(0, dl, MVT::i64)); in combineAcrossLanesIntrinsic()
14133 DAG.getConstant(ElemSize, dl, MVT::i32)); in LowerSVEIntrinsicEXT()
14170 Imm = DAG.getConstant(ImmVal, DL, MVT::i32); in tryConvertSVEWideCompare()
14184 Imm = DAG.getConstant(ImmVal, DL, MVT::i32); in tryConvertSVEWideCompare()
14214 SDValue TVal = DAG.getConstant(1, DL, OutVT); in getPTest()
14215 SDValue FVal = DAG.getConstant(0, DL, OutVT); in getPTest()
14222 SDValue CC = DAG.getConstant(getInvertedCondCode(Cond), DL, MVT::i32); in getPTest()
14241 SDValue Zero = DAG.getConstant(0, DL, MVT::i64); in combineSVEReductionInt()
14258 SDValue Zero = DAG.getConstant(0, DL, MVT::i64); in combineSVEReductionFP()
14274 SDValue Zero = DAG.getConstant(0, DL, MVT::i64); in combineSVEReductionOrderedFP()
14616 DAG.getConstant(BaseOffset + Offset, DL, MVT::i64)); in splitStoreSplat()
14695 SDValue PassThru = DAG.getConstant(0, DL, LoadVT); in performLDNT1Combine()
14978 DAG.getConstant(0, DL, MVT::i64)); in splitStores()
14980 DAG.getConstant(NumElts, DL, MVT::i64)); in splitStores()
14986 DAG.getConstant(8, DL, MVT::i64)); in splitStores()
15759 LHS.getOperand(1), DAG.getConstant(NewCond, DL, MVT::i32), in performSETCCCombine()
15888 DAG.getConstant(Bit, DL, MVT::i64), N->getOperand(3)); in performTBZCombine()
15923 NumElts, DAG.getConstant(VT.getScalarSizeInBits() - 1, SDLoc(N), in performVSelectCombine()
16079 DAG.getConstant(MinOffset, DL, MVT::i64)); in performGlobalAddressCombine()
16089 SDValue Shift = DAG.getConstant(Log2_32(BitWidth / 8), DL, MVT::i64); in getScaledOffsetForBitWidth()
16503 Ops[1] = DAG.getConstant(Intrinsic::aarch64_sve_prfb_gather_uxtw_index, DL, in combineSVEPrefetchVecBaseImmOff()
16924 N->getOperand(0), DAG.getConstant(Register, DL, MVT::i64)); in PerformDAGCombine()
16926 AArch64ISD::CSINC, DL, MVT::i32, DAG.getConstant(0, DL, MVT::i32), in PerformDAGCombine()
16927 DAG.getConstant(0, DL, MVT::i32), in PerformDAGCombine()
16928 DAG.getConstant(AArch64CC::NE, DL, MVT::i32), A.getValue(1)); in PerformDAGCombine()
17104 DAG.getConstant(64, DL, MVT::i64))); in splitInt128()
17147 DAG.getNode(ISD::SRL, dl, MVT::i128, V, DAG.getConstant(64, dl, MVT::i64)), in createGPRPairNode()
17918 SDValue Zero = DAG.getConstant(0, DL, MVT::i64); in convertToScalableVector()
17929 SDValue Zero = DAG.getConstant(0, DL, MVT::i64); in convertFromScalableVector()
17960 auto Op2 = DAG.getConstant(0, DL, ContainerVT); in convertFixedMaskToScalableVector()
17990 PassThru = DAG.getConstant(0, DL, ContainerVT); in LowerFixedLengthVectorMLoadToSVE()
18314 SDValue Zero = DAG.getConstant(0, DL, MVT::i64); in LowerVECREDUCE_SEQ_FADD()
18382 Rdx, DAG.getConstant(0, DL, MVT::i64)); in LowerReductionToSVE()
18655 DAG.getConstant(VT.getVectorNumElements() - 1, DL, MVT::i64)); in LowerFixedLengthVECTOR_SHUFFLEToSVE()