Lines Matching refs:LowerReductionToSVE
10965 return LowerReductionToSVE(AArch64ISD::UADDV_PRED, Op, DAG); in LowerVECREDUCE()
10967 return LowerReductionToSVE(AArch64ISD::ANDV_PRED, Op, DAG); in LowerVECREDUCE()
10969 return LowerReductionToSVE(AArch64ISD::ORV_PRED, Op, DAG); in LowerVECREDUCE()
10971 return LowerReductionToSVE(AArch64ISD::SMAXV_PRED, Op, DAG); in LowerVECREDUCE()
10973 return LowerReductionToSVE(AArch64ISD::SMINV_PRED, Op, DAG); in LowerVECREDUCE()
10975 return LowerReductionToSVE(AArch64ISD::UMAXV_PRED, Op, DAG); in LowerVECREDUCE()
10977 return LowerReductionToSVE(AArch64ISD::UMINV_PRED, Op, DAG); in LowerVECREDUCE()
10979 return LowerReductionToSVE(AArch64ISD::EORV_PRED, Op, DAG); in LowerVECREDUCE()
10981 return LowerReductionToSVE(AArch64ISD::FADDV_PRED, Op, DAG); in LowerVECREDUCE()
10983 return LowerReductionToSVE(AArch64ISD::FMAXNMV_PRED, Op, DAG); in LowerVECREDUCE()
10985 return LowerReductionToSVE(AArch64ISD::FMINNMV_PRED, Op, DAG); in LowerVECREDUCE()
18360 SDValue AArch64TargetLowering::LowerReductionToSVE(unsigned Opcode, in LowerReductionToSVE() function in AArch64TargetLowering