3105     SDValue FVal = DAG.getConstant(0, dl, MVT::i32);  in LowerXOR()  local
3110     return DAG.getNode(AArch64ISD::CSEL, dl, Op.getValueType(), TVal, FVal,  in LowerXOR()
3130   SDValue FVal = Sel.getOperand(3);  in LowerXOR()  local
3136   ConstantSDNode *CFVal = dyn_cast<ConstantSDNode>(FVal);  in LowerXOR()
3146     std::swap(TVal, FVal);  in LowerXOR()
3156     FVal = Other;  in LowerXOR()
3160     return DAG.getNode(AArch64ISD::CSEL, dl, Sel.getValueType(), FVal, TVal,  in LowerXOR()
3216   SDValue FVal = DAG.getConstant(0, dl, MVT::i32);  in LowerXALUO()  local
3222   Overflow = DAG.getNode(AArch64ISD::CSEL, dl, MVT::i32, FVal, TVal,  in LowerXALUO()
7214   SDValue FVal = DAG.getConstant(0, dl, VT);  in LowerSETCC()  local
7238     SDValue Res = DAG.getNode(AArch64ISD::CSEL, dl, VT, FVal, TVal, CCVal, Cmp);  in LowerSETCC()
7265     Res = DAG.getNode(AArch64ISD::CSEL, dl, VT, FVal, TVal, CC1Val, Cmp);  in LowerSETCC()
7275         DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, FVal, CC1Val, Cmp);  in LowerSETCC()
7285                                               SDValue FVal, const SDLoc &dl,  in LowerSELECT_CC()  argument
7311     ConstantSDNode *CFVal = dyn_cast<ConstantSDNode>(FVal);  in LowerSELECT_CC()
7332       std::swap(TVal, FVal);  in LowerSELECT_CC()
7336       std::swap(TVal, FVal);  in LowerSELECT_CC()
7343         std::swap(TVal, FVal);  in LowerSELECT_CC()
7351         std::swap(TVal, FVal);  in LowerSELECT_CC()
7395         std::swap(TVal, FVal);  in LowerSELECT_CC()
7403         FVal = TVal;  in LowerSELECT_CC()
7421         FVal = LHS;  in LowerSELECT_CC()
7430         FVal = DAG.getConstant(0, dl, FVal.getValueType());  in LowerSELECT_CC()
7437     return DAG.getNode(Opcode, dl, VT, TVal, FVal, CCVal, Cmp);  in LowerSELECT_CC()
7457       ConstantFPSDNode *CFVal = dyn_cast<ConstantFPSDNode>(FVal);  in LowerSELECT_CC()
7465                FVal.getValueType() == LHS.getValueType())  in LowerSELECT_CC()
7466         FVal = LHS;  in LowerSELECT_CC()
7472   SDValue CS1 = DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, FVal, CC1Val, Cmp);  in LowerSELECT_CC()
7501   SDValue FVal = Op.getOperand(3);  in LowerSELECT_CC()  local
7503   return LowerSELECT_CC(CC, LHS, RHS, TVal, FVal, DL, DAG);  in LowerSELECT_CC()
7510   SDValue FVal = Op->getOperand(2);  in LowerSELECT()  local
7518     return DAG.getNode(ISD::VSELECT, DL, Ty, SplatPred, TVal, FVal);  in LowerSELECT()
7529     return DAG.getNode(ISD::VSELECT, DL, Ty, SplatPred, TVal, FVal);  in LowerSELECT()
7544     return DAG.getNode(AArch64ISD::CSEL, DL, Op.getValueType(), TVal, FVal,  in LowerSELECT()
7560   return LowerSELECT_CC(CC, LHS, RHS, TVal, FVal, DL, DAG);  in LowerSELECT()
14215   SDValue FVal = DAG.getConstant(0, DL, OutVT);  in getPTest()  local
14223   SDValue Res = DAG.getNode(AArch64ISD::CSEL, DL, OutVT, FVal, TVal, CC, Test);  in getPTest()