2237 	u32 reg_val;  in ixgbe_setup_kr_speed_x550em()  local
2241 					IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);  in ixgbe_setup_kr_speed_x550em()
2245 	reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE;  in ixgbe_setup_kr_speed_x550em()
2246 	reg_val &= ~(IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR |  in ixgbe_setup_kr_speed_x550em()
2251 		reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KR;  in ixgbe_setup_kr_speed_x550em()
2255 		reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_AN_CAP_KX;  in ixgbe_setup_kr_speed_x550em()
2259 					IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);  in ixgbe_setup_kr_speed_x550em()
2265 				    IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);  in ixgbe_setup_kr_speed_x550em()
2270 		reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK;  in ixgbe_setup_kr_speed_x550em()
2271 		reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_AN;  in ixgbe_setup_kr_speed_x550em()
2272 		reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_AN_EN;  in ixgbe_setup_kr_speed_x550em()
2273 		reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN37_EN;  in ixgbe_setup_kr_speed_x550em()
2274 		reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SGMII_EN;  in ixgbe_setup_kr_speed_x550em()
2278 				    IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);  in ixgbe_setup_kr_speed_x550em()
2711 	u16 reg_slice, reg_val;  in ixgbe_setup_mac_link_sfp_x550em()  local
2735 		reg_val = (IXGBE_CS4227_EDC_MODE_CX1 << 1) | 0x1;  in ixgbe_setup_mac_link_sfp_x550em()
2737 		reg_val = (IXGBE_CS4227_EDC_MODE_SR << 1) | 0x1;  in ixgbe_setup_mac_link_sfp_x550em()
2739 					  reg_val);  in ixgbe_setup_mac_link_sfp_x550em()
2755 	u32 reg_val;  in ixgbe_setup_sfi_x550a()  local
2760 				IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);  in ixgbe_setup_sfi_x550a()
2764 	reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN_EN;  in ixgbe_setup_sfi_x550a()
2765 	reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN37_EN;  in ixgbe_setup_sfi_x550a()
2766 	reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SGMII_EN;  in ixgbe_setup_sfi_x550a()
2767 	reg_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK;  in ixgbe_setup_sfi_x550a()
2772 		reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_10G;  in ixgbe_setup_sfi_x550a()
2775 		reg_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_1G;  in ixgbe_setup_sfi_x550a()
2784 				IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);  in ixgbe_setup_sfi_x550a()
2905 	u32 reg_val;  in ixgbe_setup_ixfi_x550em_x()  local
2910 				IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);  in ixgbe_setup_ixfi_x550em_x()
2913 	reg_val |= IXGBE_KRM_RX_TRN_LINKUP_CTRL_CONV_WO_PROTOCOL;  in ixgbe_setup_ixfi_x550em_x()
2916 				IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);  in ixgbe_setup_ixfi_x550em_x()
2923 				IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);  in ixgbe_setup_ixfi_x550em_x()
2926 	reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_C0_EN;  in ixgbe_setup_ixfi_x550em_x()
2927 	reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_CP1_CN1_EN;  in ixgbe_setup_ixfi_x550em_x()
2928 	reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_CO_ADAPT_EN;  in ixgbe_setup_ixfi_x550em_x()
2931 				IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);  in ixgbe_setup_ixfi_x550em_x()
2936 				IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);  in ixgbe_setup_ixfi_x550em_x()
2939 	reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_C0_EN;  in ixgbe_setup_ixfi_x550em_x()
2940 	reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_CP1_CN1_EN;  in ixgbe_setup_ixfi_x550em_x()
2941 	reg_val &= ~IXGBE_KRM_DSP_TXFFE_STATE_CO_ADAPT_EN;  in ixgbe_setup_ixfi_x550em_x()
2944 				IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);  in ixgbe_setup_ixfi_x550em_x()
2951 				IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);  in ixgbe_setup_ixfi_x550em_x()
2954 	reg_val |= IXGBE_KRM_TX_COEFF_CTRL_1_OVRRD_EN;  in ixgbe_setup_ixfi_x550em_x()
2955 	reg_val |= IXGBE_KRM_TX_COEFF_CTRL_1_CZERO_EN;  in ixgbe_setup_ixfi_x550em_x()
2956 	reg_val |= IXGBE_KRM_TX_COEFF_CTRL_1_CPLUS1_OVRRD_EN;  in ixgbe_setup_ixfi_x550em_x()
2957 	reg_val |= IXGBE_KRM_TX_COEFF_CTRL_1_CMINUS1_OVRRD_EN;  in ixgbe_setup_ixfi_x550em_x()
2960 				IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);  in ixgbe_setup_ixfi_x550em_x()
2976 	u32 reg_val;  in ixgbe_setup_ixfi_x550em()  local
2985 					IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);  in ixgbe_setup_ixfi_x550em()
2989 	reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE;  in ixgbe_setup_ixfi_x550em()
2990 	reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_MASK;  in ixgbe_setup_ixfi_x550em()
2995 		reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_10G;  in ixgbe_setup_ixfi_x550em()
2998 		reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_1G;  in ixgbe_setup_ixfi_x550em()
3007 					IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);  in ixgbe_setup_ixfi_x550em()
3134 	u32 reg_val;  in ixgbe_setup_phy_loopback_x550em()  local
3139 					IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);  in ixgbe_setup_phy_loopback_x550em()
3142 	reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE;  in ixgbe_setup_phy_loopback_x550em()
3143 	reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_MASK;  in ixgbe_setup_phy_loopback_x550em()
3144 	reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_10G;  in ixgbe_setup_phy_loopback_x550em()
3147 					IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);  in ixgbe_setup_phy_loopback_x550em()
3154 				IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);  in ixgbe_setup_phy_loopback_x550em()
3157 	reg_val |= IXGBE_KRM_PORT_CAR_GEN_CTRL_NELB_32B;  in ixgbe_setup_phy_loopback_x550em()
3158 	reg_val |= IXGBE_KRM_PORT_CAR_GEN_CTRL_NELB_KRPCS;  in ixgbe_setup_phy_loopback_x550em()
3161 				IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);  in ixgbe_setup_phy_loopback_x550em()
3168 				IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);  in ixgbe_setup_phy_loopback_x550em()
3171 	reg_val |= IXGBE_KRM_PMD_DFX_BURNIN_TX_RX_KR_LB_MASK;  in ixgbe_setup_phy_loopback_x550em()
3174 				IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);  in ixgbe_setup_phy_loopback_x550em()
3181 				IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);  in ixgbe_setup_phy_loopback_x550em()
3184 	reg_val |= IXGBE_KRM_RX_TRN_LINKUP_CTRL_PROTOCOL_BYPASS;  in ixgbe_setup_phy_loopback_x550em()
3187 				IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);  in ixgbe_setup_phy_loopback_x550em()
3980 	u32 pause, asm_dir, reg_val;  in ixgbe_setup_fc_X550em()  local
4034 					IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val);  in ixgbe_setup_fc_X550em()
4037 		reg_val &= ~(IXGBE_KRM_AN_CNTL_1_SYM_PAUSE |  in ixgbe_setup_fc_X550em()
4040 			reg_val |= IXGBE_KRM_AN_CNTL_1_SYM_PAUSE;  in ixgbe_setup_fc_X550em()
4042 			reg_val |= IXGBE_KRM_AN_CNTL_1_ASM_PAUSE;  in ixgbe_setup_fc_X550em()
4045 					IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val);  in ixgbe_setup_fc_X550em()