Lines Matching refs:page_size
137 int page_size; member
393 if (!cvmx_nand_default.page_size) in __set_chip_defaults()
395 cvmx_nand_state[chip].page_size = cvmx_nand_default.page_size; /* NAND page size in bytes */ in __set_chip_defaults()
406 …__FUNCTION__, cvmx_nand_state[chip].page_size, cvmx_nand_state[chip].oob_size, cvmx_nand_state[chi… in __set_chip_defaults()
549 if (cvmx_nand_default.page_size) in cvmx_nand_initialize()
580 cvmx_nand_state[chip].page_size = 0; in cvmx_nand_initialize()
665 … cvmx_nand_state[chip].page_size = cvmx_le32_to_cpu(onfi_param_page->page_data_bytes); in cvmx_nand_initialize()
691 …if (cvmx_nand_state[chip].page_size + cvmx_nand_state[chip].oob_size > CVMX_NAND_MAX_PAGE_AND_OOB_… in cvmx_nand_initialize()
694 …__FUNCTION__, cvmx_nand_state[chip].page_size, cvmx_nand_state[chip].oob_size, CVMX_NAND_MAX_PAGE_… in cvmx_nand_initialize()
721 …cvmx_nand_state[chip].page_size = 1024 << (nand_id_buffer[3] & 0x3); /* NAND page size in bytes */ in cvmx_nand_initialize()
723 …cvmx_nand_state[chip].oob_size = (cvmx_nand_state[chip].page_size / 512) * ((nand_id_buffer[3] & 4… in cvmx_nand_initialize()
724 …].pages_per_block = (0x10000 << ((nand_id_buffer[3] & 0x30) >> 4))/cvmx_nand_state[chip].page_size; in cvmx_nand_initialize()
728 cvmx_nand_state[chip].oob_size = cvmx_nand_state[chip].page_size/64; in cvmx_nand_initialize()
732 …cvmx_nand_state[chip].blocks = nand_size_bits/(8ULL*cvmx_nand_state[chip].page_size*cvmx_nand_stat… in cvmx_nand_initialize()
747 …__FUNCTION__, cvmx_nand_state[chip].page_size, cvmx_nand_state[chip].oob_size, cvmx_nand_state[chi… in cvmx_nand_initialize()
752 …if (cvmx_nand_state[chip].page_size + cvmx_nand_state[chip].oob_size > CVMX_NAND_MAX_PAGE_AND_OOB_… in cvmx_nand_initialize()
755 …__FUNCTION__, cvmx_nand_state[chip].page_size, cvmx_nand_state[chip].oob_size, CVMX_NAND_MAX_PAGE_… in cvmx_nand_initialize()
771 if (cvmx_nand_default.page_size) in cvmx_nand_initialize()
818 if (cvmx_nand_state[chip].page_size) in cvmx_nand_get_active_chips()
848 if (!cvmx_nand_state[chip].page_size) in cvmx_nand_set_timing()
955 return cvmx_pop(cvmx_nand_state[chip].page_size - 1); in __cvmx_nand_get_column_bits()
1084 int column = nand_address & (cvmx_nand_state[chip].page_size-1); in __cvmx_nand_build_pre_cmd()
1338 if (!cvmx_nand_state[chip].page_size) in cvmx_nand_page_read()
1351 …= (nand_address & ~(cvmx_nand_state[chip].page_size - 1)) | ((nand_address & (cvmx_nand_state[chi… in cvmx_nand_page_read()
1385 if (!cvmx_nand_state[chip].page_size) in cvmx_nand_page_write()
1394 …= (nand_address & ~(cvmx_nand_state[chip].page_size - 1)) | ((nand_address & (cvmx_nand_state[chi… in cvmx_nand_page_write()
1396 buffer_length = cvmx_nand_state[chip].page_size + cvmx_nand_state[chip].oob_size; in cvmx_nand_page_write()
1468 if (!cvmx_nand_state[chip].page_size) in cvmx_nand_block_erase()
1640 CVMX_NAND_RETURN(cvmx_nand_state[chip].page_size); in cvmx_nand_get_page_size()
1716 if (!cvmx_nand_state[chip].page_size) in cvmx_nand_reset()
1980 cvmx_nand_status_t cvmx_nand_set_defaults(int page_size, int oob_size, int pages_per_block, int blo… in cvmx_nand_set_defaults() argument
1982 if (!page_size || !oob_size || !pages_per_block || !blocks || onfi_timing_mode > 5) in cvmx_nand_set_defaults()
1985 cvmx_nand_default.page_size = page_size; in cvmx_nand_set_defaults()