Lines Matching refs:Reg1
524 unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(2).getReg()); in InsertSEH() local
527 .addImm(Reg1) in InsertSEH()
537 Register Reg1 = MBBI->getOperand(2).getReg(); in InsertSEH() local
538 if (Reg0 == AArch64::FP && Reg1 == AArch64::LR) in InsertSEH()
545 .addImm(RegInfo->getSEHRegNum(Reg1)) in InsertSEH()
575 unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg()); in InsertSEH() local
578 .addImm(Reg1) in InsertSEH()
586 Register Reg1 = MBBI->getOperand(1).getReg(); in InsertSEH() local
587 if (Reg0 == AArch64::FP && Reg1 == AArch64::LR) in InsertSEH()
594 .addImm(RegInfo->getSEHRegNum(Reg1)) in InsertSEH()
1873 static bool invalidateWindowsRegisterPairing(unsigned Reg1, unsigned Reg2, in invalidateWindowsRegisterPairing() argument
1887 if (Reg2 == Reg1 + 1) in invalidateWindowsRegisterPairing()
1896 static bool invalidateRegisterPairing(unsigned Reg1, unsigned Reg2, in invalidateRegisterPairing() argument
1899 return invalidateWindowsRegisterPairing(Reg1, Reg2, NeedsWinCFI); in invalidateRegisterPairing()
1912 unsigned Reg1 = AArch64::NoRegister; member
1971 RPI.Reg1 = CSI[i].getReg(); in computeCalleeSaveRegisterPairs()
1973 if (AArch64::GPR64RegClass.contains(RPI.Reg1)) in computeCalleeSaveRegisterPairs()
1975 else if (AArch64::FPR64RegClass.contains(RPI.Reg1)) in computeCalleeSaveRegisterPairs()
1977 else if (AArch64::FPR128RegClass.contains(RPI.Reg1)) in computeCalleeSaveRegisterPairs()
1979 else if (AArch64::ZPRRegClass.contains(RPI.Reg1)) in computeCalleeSaveRegisterPairs()
1981 else if (AArch64::PPRRegClass.contains(RPI.Reg1)) in computeCalleeSaveRegisterPairs()
1992 !invalidateRegisterPairing(RPI.Reg1, NextReg, IsWindows, NeedsWinCFI, in computeCalleeSaveRegisterPairs()
1998 !invalidateWindowsRegisterPairing(RPI.Reg1, NextReg, NeedsWinCFI)) in computeCalleeSaveRegisterPairs()
2013 if ((RPI.Reg1 == AArch64::LR || RPI.Reg2 == AArch64::LR) && in computeCalleeSaveRegisterPairs()
2031 RPI.Reg1 == AArch64::LR) && in computeCalleeSaveRegisterPairs()
2035 assert((!RPI.isPaired() || !NeedsFrameRecord || RPI.Reg1 != AArch64::FP || in computeCalleeSaveRegisterPairs()
2044 ((RPI.Reg1 == AArch64::LR && RPI.Reg2 == AArch64::FP) || in computeCalleeSaveRegisterPairs()
2045 RPI.Reg1 + 1 == RPI.Reg2))) && in computeCalleeSaveRegisterPairs()
2137 unsigned Reg1 = RPI.Reg1; in spillCalleeSavedRegisters() local
2179 LLVM_DEBUG(dbgs() << "CSR spill: (" << printReg(Reg1, TRI); in spillCalleeSavedRegisters()
2185 assert((!NeedsWinCFI || !(Reg1 == AArch64::LR && Reg2 == AArch64::FP)) && in spillCalleeSavedRegisters()
2193 std::swap(Reg1, Reg2); in spillCalleeSavedRegisters()
2197 if (!MRI.isReserved(Reg1)) in spillCalleeSavedRegisters()
2198 MBB.addLiveIn(Reg1); in spillCalleeSavedRegisters()
2207 MIB.addReg(Reg1, getPrologueDeath(MF, Reg1)) in spillCalleeSavedRegisters()
2245 unsigned Reg1 = RPI.Reg1; in restoreCalleeSavedRegisters() local
2285 LLVM_DEBUG(dbgs() << "CSR restore: (" << printReg(Reg1, TRI); in restoreCalleeSavedRegisters()
2297 std::swap(Reg1, Reg2); in restoreCalleeSavedRegisters()
2307 MIB.addReg(Reg1, getDefRegState(true)) in restoreCalleeSavedRegisters()