53 	int pipe = intel_plane->pipe;  in ivb_update_plane()  local
57 	sprctl = I915_READ(SPRCTL(pipe));  in ivb_update_plane()
109 	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size);  in ivb_update_plane()
120 			intel_wait_for_vblank(dev, pipe);  in ivb_update_plane()
131 	I915_WRITE(SPRSTRIDE(pipe), fb->pitches[0]);  in ivb_update_plane()
132 	I915_WRITE(SPRPOS(pipe), (crtc_y << 16) | crtc_x);  in ivb_update_plane()
134 		I915_WRITE(SPRTILEOFF(pipe), (y << 16) | x);  in ivb_update_plane()
139 		I915_WRITE(SPRLINOFF(pipe), offset);  in ivb_update_plane()
141 	I915_WRITE(SPRSIZE(pipe), (crtc_h << 16) | crtc_w);  in ivb_update_plane()
142 	I915_WRITE(SPRSCALE(pipe), sprscale);  in ivb_update_plane()
143 	I915_WRITE(SPRCTL(pipe), sprctl);  in ivb_update_plane()
144 	I915_MODIFY_DISPBASE(SPRSURF(pipe), obj->gtt_offset);  in ivb_update_plane()
145 	POSTING_READ(SPRSURF(pipe));  in ivb_update_plane()
154 	int pipe = intel_plane->pipe;  in ivb_disable_plane()  local
156 	I915_WRITE(SPRCTL(pipe), I915_READ(SPRCTL(pipe)) & ~SPRITE_ENABLE);  in ivb_disable_plane()
158 	I915_WRITE(SPRSCALE(pipe), 0);  in ivb_disable_plane()
160 	I915_MODIFY_DISPBASE(SPRSURF(pipe), 0);  in ivb_disable_plane()
161 	POSTING_READ(SPRSURF(pipe));  in ivb_disable_plane()
179 	I915_WRITE(SPRKEYVAL(intel_plane->pipe), key->min_value);  in ivb_update_colorkey()
180 	I915_WRITE(SPRKEYMAX(intel_plane->pipe), key->max_value);  in ivb_update_colorkey()
181 	I915_WRITE(SPRKEYMSK(intel_plane->pipe), key->channel_mask);  in ivb_update_colorkey()
183 	sprctl = I915_READ(SPRCTL(intel_plane->pipe));  in ivb_update_colorkey()
189 	I915_WRITE(SPRCTL(intel_plane->pipe), sprctl);  in ivb_update_colorkey()
191 	POSTING_READ(SPRKEYMSK(intel_plane->pipe));  in ivb_update_colorkey()
206 	key->min_value = I915_READ(SPRKEYVAL(intel_plane->pipe));  in ivb_get_colorkey()
207 	key->max_value = I915_READ(SPRKEYMAX(intel_plane->pipe));  in ivb_get_colorkey()
208 	key->channel_mask = I915_READ(SPRKEYMSK(intel_plane->pipe));  in ivb_get_colorkey()
211 	sprctl = I915_READ(SPRCTL(intel_plane->pipe));  in ivb_get_colorkey()
231 	int pipe = intel_plane->pipe, pixel_size;  in ilk_update_plane()  local
234 	dvscntr = I915_READ(DVSCNTR(pipe));  in ilk_update_plane()
286 	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size);  in ilk_update_plane()
292 	I915_WRITE(DVSSTRIDE(pipe), fb->pitches[0]);  in ilk_update_plane()
293 	I915_WRITE(DVSPOS(pipe), (crtc_y << 16) | crtc_x);  in ilk_update_plane()
295 		I915_WRITE(DVSTILEOFF(pipe), (y << 16) | x);  in ilk_update_plane()
300 		I915_WRITE(DVSLINOFF(pipe), offset);  in ilk_update_plane()
302 	I915_WRITE(DVSSIZE(pipe), (crtc_h << 16) | crtc_w);  in ilk_update_plane()
303 	I915_WRITE(DVSSCALE(pipe), dvsscale);  in ilk_update_plane()
304 	I915_WRITE(DVSCNTR(pipe), dvscntr);  in ilk_update_plane()
305 	I915_MODIFY_DISPBASE(DVSSURF(pipe), obj->gtt_offset);  in ilk_update_plane()
306 	POSTING_READ(DVSSURF(pipe));  in ilk_update_plane()
315 	int pipe = intel_plane->pipe;  in ilk_disable_plane()  local
317 	I915_WRITE(DVSCNTR(pipe), I915_READ(DVSCNTR(pipe)) & ~DVS_ENABLE);  in ilk_disable_plane()
319 	I915_WRITE(DVSSCALE(pipe), 0);  in ilk_disable_plane()
321 	I915_MODIFY_DISPBASE(DVSSURF(pipe), 0);  in ilk_disable_plane()
322 	POSTING_READ(DVSSURF(pipe));  in ilk_disable_plane()
359 	I915_WRITE(DVSKEYVAL(intel_plane->pipe), key->min_value);  in ilk_update_colorkey()
360 	I915_WRITE(DVSKEYMAX(intel_plane->pipe), key->max_value);  in ilk_update_colorkey()
361 	I915_WRITE(DVSKEYMSK(intel_plane->pipe), key->channel_mask);  in ilk_update_colorkey()
363 	dvscntr = I915_READ(DVSCNTR(intel_plane->pipe));  in ilk_update_colorkey()
369 	I915_WRITE(DVSCNTR(intel_plane->pipe), dvscntr);  in ilk_update_colorkey()
371 	POSTING_READ(DVSKEYMSK(intel_plane->pipe));  in ilk_update_colorkey()
386 	key->min_value = I915_READ(DVSKEYVAL(intel_plane->pipe));  in ilk_get_colorkey()
387 	key->max_value = I915_READ(DVSKEYMAX(intel_plane->pipe));  in ilk_get_colorkey()
388 	key->channel_mask = I915_READ(DVSKEYMSK(intel_plane->pipe));  in ilk_get_colorkey()
391 	dvscntr = I915_READ(DVSCNTR(intel_plane->pipe));  in ilk_get_colorkey()
414 	int pipe = intel_plane->pipe;  in intel_update_plane()  local
429 	if (!(I915_READ(PIPECONF(pipe)) & PIPECONF_ENABLE))  in intel_update_plane()
436 	if (intel_plane->pipe != intel_crtc->pipe)  in intel_update_plane()
515 			intel_wait_for_vblank(dev, to_intel_crtc(crtc)->pipe);  in intel_update_plane()
647 intel_plane_init(struct drm_device *dev, enum pipe pipe)  in intel_plane_init()  argument
694 	intel_plane->pipe = pipe;  in intel_plane_init()
695 	possible_crtcs = (1 << pipe);  in intel_plane_init()