Lines Matching refs:SDValue

28   void ExtractVectorElements(SDValue Op, SelectionDAG &DAG,
29                              SmallVectorImpl<SDValue> &Args,
31   SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
32   SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;
33   SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
34   SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
37   SDValue MergeVectorStore(const SDValue &Op, SelectionDAG &DAG) const;
40   SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
41   SDValue LowerUINT_TO_FP(SDValue Op, SelectionDAG &DAG) const;
49   virtual SDValue CreateLiveInRegister(SelectionDAG &DAG,
52   SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
55   SDValue SplitVectorLoad(const SDValue &Op, SelectionDAG &DAG) const;
56   SDValue SplitVectorStore(SDValue Op, SelectionDAG &DAG) const;
57   SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
58   bool isHWTrueValue(SDValue Op) const;
59   bool isHWFalseValue(SDValue Op) const;
81   virtual SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv,
84                               const SmallVectorImpl<SDValue> &OutVals,
86   virtual SDValue LowerCall(CallLoweringInfo &CLI,
87                             SmallVectorImpl<SDValue> &InVals) const {
92   virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
93   SDValue LowerIntrinsicIABS(SDValue Op, SelectionDAG &DAG) const;
94   SDValue LowerIntrinsicLRP(SDValue Op, SelectionDAG &DAG) const;
95   SDValue LowerMinMax(SDValue Op, SelectionDAG &DAG) const;
108   virtual void computeMaskedBitsForTargetNode(const SDValue Op,
125   SDValue LowerSREM(SDValue Op, SelectionDAG &DAG) const;
126   SDValue LowerSREM8(SDValue Op, SelectionDAG &DAG) const;
127   SDValue LowerSREM16(SDValue Op, SelectionDAG &DAG) const;
128   SDValue LowerSREM32(SDValue Op, SelectionDAG &DAG) const;
129   SDValue LowerSREM64(SDValue Op, SelectionDAG &DAG) const;
130   SDValue LowerSDIV(SDValue Op, SelectionDAG &DAG) const;
131   SDValue LowerSDIV24(SDValue Op, SelectionDAG &DAG) const;
132   SDValue LowerSDIV32(SDValue Op, SelectionDAG &DAG) const;
133   SDValue LowerSDIV64(SDValue Op, SelectionDAG &DAG) const;
134   SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
136   SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
137   SDValue LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const;