Lines Matching refs:MVT
111 virtual unsigned FastEmit_i(MVT Ty, MVT RetTy, unsigned Opc, uint64_t Imm);
143 bool isTypeLegal(Type *Ty, MVT &VT);
144 bool isLoadTypeLegal(Type *Ty, MVT &VT);
147 bool PPCEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr,
150 bool PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr);
152 void PPCSimplifyAddress(Address &Addr, MVT VT, bool &UseOffset,
154 bool PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
156 unsigned PPCMaterializeFP(const ConstantFP *CFP, MVT VT);
157 unsigned PPCMaterializeGV(const GlobalValue *GV, MVT VT);
158 unsigned PPCMaterializeInt(const Constant *C, MVT VT);
163 unsigned PPCMoveToIntReg(const Instruction *I, MVT VT,
165 unsigned PPCMoveToFPReg(MVT VT, unsigned SrcReg, bool IsSigned);
171 SmallVectorImpl<MVT> &ArgVTs,
177 void finishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
257 bool PPCFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal()
261 if (Evt == MVT::Other || !Evt.isSimple()) return false; in isTypeLegal()
271 bool PPCFastISel::isLoadTypeLegal(Type *Ty, MVT &VT) { in isLoadTypeLegal()
276 if (VT == MVT::i8 || VT == MVT::i16 || VT == MVT::i32) { in isLoadTypeLegal()
398 void PPCFastISel::PPCSimplifyAddress(Address &Addr, MVT VT, bool &UseOffset, in PPCSimplifyAddress()
417 IntegerType *OffsetTy = ((VT == MVT::i32) ? Type::getInt32Ty(*Context) in PPCSimplifyAddress()
421 IndexReg = PPCMaterializeInt(Offset, MVT::i64); in PPCSimplifyAddress()
429 bool PPCFastISel::PPCEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr, in PPCEmitLoad()
445 (VT == MVT::f64 ? &PPC::F8RCRegClass : in PPCEmitLoad()
446 (VT == MVT::f32 ? &PPC::F4RCRegClass : in PPCEmitLoad()
447 (VT == MVT::i64 ? &PPC::G8RC_and_G8RC_NOX0RegClass : in PPCEmitLoad()
455 case MVT::i8: in PPCEmitLoad()
458 case MVT::i16: in PPCEmitLoad()
463 case MVT::i32: in PPCEmitLoad()
470 case MVT::i64: in PPCEmitLoad()
476 case MVT::f32: in PPCEmitLoad()
479 case MVT::f64: in PPCEmitLoad()
546 MVT VT; in SelectLoad()
570 bool PPCFastISel::PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr) { in PPCEmitStore()
581 case MVT::i8: in PPCEmitStore()
584 case MVT::i16: in PPCEmitStore()
587 case MVT::i32: in PPCEmitStore()
591 case MVT::i64: in PPCEmitStore()
595 case MVT::f32: in PPCEmitStore()
598 case MVT::f64: in PPCEmitStore()
660 MVT VT; in SelectStore()
738 MVT SrcVT = SrcEVT.getSimpleVT(); in PPCEmitCmp()
750 if (SrcVT == MVT::i64 || SrcVT == MVT::i32 || SrcVT == MVT::i16 || in PPCEmitCmp()
751 SrcVT == MVT::i8 || SrcVT == MVT::i1) { in PPCEmitCmp()
763 case MVT::f32: in PPCEmitCmp()
766 case MVT::f64: in PPCEmitCmp()
769 case MVT::i1: in PPCEmitCmp()
770 case MVT::i8: in PPCEmitCmp()
771 case MVT::i16: in PPCEmitCmp()
774 case MVT::i32: in PPCEmitCmp()
780 case MVT::i64: in PPCEmitCmp()
801 if (!PPCEmitIntExt(SrcVT, SrcReg1, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp()
807 if (!PPCEmitIntExt(SrcVT, SrcReg2, MVT::i32, ExtReg, IsZExt)) in PPCEmitCmp()
829 if (SrcVT != MVT::f32 || DestVT != MVT::f64) in SelectFPExt()
847 if (SrcVT != MVT::f64 || DestVT != MVT::f32) in SelectFPTrunc()
870 unsigned PPCFastISel::PPCMoveToFPReg(MVT SrcVT, unsigned SrcReg, in PPCMoveToFPReg()
874 if (SrcVT == MVT::i32) { in PPCMoveToFPReg()
876 if (!PPCEmitIntExt(MVT::i32, SrcReg, MVT::i64, TmpReg, !IsSigned)) in PPCMoveToFPReg()
887 if (!PPCEmitStore(MVT::i64, SrcReg, Addr)) in PPCMoveToFPReg()
894 if (SrcVT == MVT::i32) { in PPCMoveToFPReg()
906 if (!PPCEmitLoad(MVT::f64, ResultReg, Addr, RC, !IsSigned, LoadOpc)) in PPCMoveToFPReg()
914 MVT DstVT; in SelectIToFP()
919 if (DstVT != MVT::f32 && DstVT != MVT::f64) in SelectIToFP()
927 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP()
929 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 && in SelectIToFP()
930 SrcVT != MVT::i32 && SrcVT != MVT::i64) in SelectIToFP()
947 if (DstVT == MVT::f32 && !PPCSubTarget.hasFPCVT()) in SelectIToFP()
951 if (SrcVT == MVT::i8 || SrcVT == MVT::i16) { in SelectIToFP()
953 if (!PPCEmitIntExt(SrcVT, SrcReg, MVT::i64, TmpReg, !IsSigned)) in SelectIToFP()
955 SrcVT = MVT::i64; in SelectIToFP()
969 if (DstVT == MVT::f32) in SelectIToFP()
987 unsigned PPCFastISel::PPCMoveToIntReg(const Instruction *I, MVT VT, in PPCMoveToIntReg()
998 if (!PPCEmitStore(MVT::f64, SrcReg, Addr)) in PPCMoveToIntReg()
1003 if (VT == MVT::i32) in PPCMoveToIntReg()
1021 MVT DstVT, SrcVT; in SelectFPToI()
1026 if (DstVT != MVT::i32 && DstVT != MVT::i64) in SelectFPToI()
1030 if (DstVT == MVT::i64 && !IsSigned && !PPCSubTarget.hasFPCVT()) in SelectFPToI()
1038 if (SrcVT != MVT::f32 && SrcVT != MVT::f64) in SelectFPToI()
1062 if (DstVT == MVT::i32) in SelectFPToI()
1090 if (DestVT != MVT::i16 && DestVT != MVT::i8) in SelectBinaryIntOp()
1190 SmallVectorImpl<MVT> &ArgVTs, in processCallArgs()
1203 MVT ArgVT = ArgVTs[VA.getValNo()]; in processCallArgs()
1234 MVT ArgVT = ArgVTs[VA.getValNo()]; in processCallArgs()
1243 MVT DestVT = VA.getLocVT(); in processCallArgs()
1245 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in processCallArgs()
1255 MVT DestVT = VA.getLocVT(); in processCallArgs()
1257 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in processCallArgs()
1274 if (ArgVT == MVT::f32 || ArgVT == MVT::f64) { in processCallArgs()
1290 void PPCFastISel::finishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, in finishCall()
1301 if (RetVT != MVT::isVoid) { in finishCall()
1309 MVT DestVT = VA.getValVT(); in finishCall()
1310 MVT CopyVT = DestVT; in finishCall()
1314 if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32) in finishCall()
1315 CopyVT = MVT::i64; in finishCall()
1329 } else if (CopyVT == MVT::f64) { in finishCall()
1338 } else if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32) { in finishCall()
1381 MVT RetVT; in SelectCall()
1383 RetVT = MVT::isVoid; in SelectCall()
1384 else if (!isTypeLegal(RetTy, RetVT) && RetVT != MVT::i16 && in SelectCall()
1385 RetVT != MVT::i8) in SelectCall()
1389 if (RetVT != MVT::isVoid && RetVT != MVT::i8 && RetVT != MVT::i16 && in SelectCall()
1390 RetVT != MVT::i32 && RetVT != MVT::i64 && RetVT != MVT::f32 && in SelectCall()
1391 RetVT != MVT::f64) { in SelectCall()
1408 SmallVector<MVT, 8> ArgVTs; in SelectCall()
1438 MVT ArgVT; in SelectCall()
1439 if (!isTypeLegal(ArgTy, ArgVT) && ArgVT != MVT::i16 && ArgVT != MVT::i8) in SelectCall()
1529 unsigned SrcReg = PPCMaterializeInt(C, MVT::i64); in SelectRet()
1552 MVT RVVT = RVEVT.getSimpleVT(); in SelectRet()
1553 MVT DestVT = VA.getLocVT(); in SelectRet()
1555 if (RVVT != DestVT && RVVT != MVT::i8 && in SelectRet()
1556 RVVT != MVT::i16 && RVVT != MVT::i32) in SelectRet()
1568 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in SelectRet()
1577 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in SelectRet()
1606 bool PPCFastISel::PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, in PPCEmitIntExt()
1608 if (DestVT != MVT::i32 && DestVT != MVT::i64) in PPCEmitIntExt()
1610 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 && SrcVT != MVT::i32) in PPCEmitIntExt()
1616 if (SrcVT == MVT::i8) in PPCEmitIntExt()
1617 Opc = (DestVT == MVT::i32) ? PPC::EXTSB : PPC::EXTSB8_32_64; in PPCEmitIntExt()
1618 else if (SrcVT == MVT::i16) in PPCEmitIntExt()
1619 Opc = (DestVT == MVT::i32) ? PPC::EXTSH : PPC::EXTSH8_32_64; in PPCEmitIntExt()
1621 assert(DestVT == MVT::i64 && "Signed extend from i32 to i32??"); in PPCEmitIntExt()
1628 } else if (DestVT == MVT::i32) { in PPCEmitIntExt()
1630 if (SrcVT == MVT::i8) in PPCEmitIntExt()
1633 assert(SrcVT == MVT::i16 && "Unsigned extend from i32 to i32??"); in PPCEmitIntExt()
1643 if (SrcVT == MVT::i8) in PPCEmitIntExt()
1645 else if (SrcVT == MVT::i16) in PPCEmitIntExt()
1680 if (SrcVT != MVT::i64 && SrcVT != MVT::i32 && SrcVT != MVT::i16) in SelectTrunc()
1683 if (DestVT != MVT::i32 && DestVT != MVT::i16 && DestVT != MVT::i8) in SelectTrunc()
1691 if (SrcVT == MVT::i64) { in SelectTrunc()
1720 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIntExt()
1721 MVT DestVT = DestEVT.getSimpleVT(); in SelectIntExt()
1730 (DestVT == MVT::i64 ? &PPC::G8RC_and_G8RC_NOX0RegClass : in SelectIntExt()
1794 unsigned PPCFastISel::PPCMaterializeFP(const ConstantFP *CFP, MVT VT) { in PPCMaterializeFP()
1796 if (VT != MVT::f32 && VT != MVT::f64) in PPCMaterializeFP()
1809 (VT == MVT::f32) ? 4 : 8, Align); in PPCMaterializeFP()
1811 unsigned Opc = (VT == MVT::f32) ? PPC::LFS : PPC::LFD; in PPCMaterializeFP()
1845 unsigned PPCFastISel::PPCMaterializeGV(const GlobalValue *GV, MVT VT) { in PPCMaterializeGV()
1846 assert(VT == MVT::i64 && "Non-address!"); in PPCMaterializeGV()
1995 unsigned PPCFastISel::PPCMaterializeInt(const Constant *C, MVT VT) { in PPCMaterializeInt()
1997 if (VT != MVT::i64 && VT != MVT::i32 && VT != MVT::i16 && in PPCMaterializeInt()
1998 VT != MVT::i8 && VT != MVT::i1) in PPCMaterializeInt()
2001 const TargetRegisterClass *RC = ((VT == MVT::i64) ? &PPC::G8RCRegClass : in PPCMaterializeInt()
2007 unsigned Opc = (VT == MVT::i64) ? PPC::LI8 : PPC::LI; in PPCMaterializeInt()
2017 if (VT == MVT::i64) in PPCMaterializeInt()
2019 else if (VT == MVT::i32) in PPCMaterializeInt()
2032 MVT VT = CEVT.getSimpleVT(); in TargetMaterializeConstant()
2050 MVT VT; in TargetMaterializeAlloca()
2077 MVT VT; in tryToFoldLoadIntoMI()
2091 if ((VT == MVT::i8 && MB <= 56) || in tryToFoldLoadIntoMI()
2092 (VT == MVT::i16 && MB <= 48) || in tryToFoldLoadIntoMI()
2093 (VT == MVT::i32 && MB <= 32)) in tryToFoldLoadIntoMI()
2102 if ((VT == MVT::i8 && MB <= 24) || in tryToFoldLoadIntoMI()
2103 (VT == MVT::i16 && MB <= 16)) in tryToFoldLoadIntoMI()
2117 if (VT != MVT::i16 && VT != MVT::i8) in tryToFoldLoadIntoMI()
2124 if (VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8) in tryToFoldLoadIntoMI()
2156 unsigned PPCFastISel::FastEmit_i(MVT Ty, MVT VT, unsigned Opc, uint64_t Imm) { in FastEmit_i()
2161 if (VT != MVT::i64 && VT != MVT::i32 && VT != MVT::i16 && in FastEmit_i()
2162 VT != MVT::i8 && VT != MVT::i1) in FastEmit_i()
2165 const TargetRegisterClass *RC = ((VT == MVT::i64) ? &PPC::G8RCRegClass : in FastEmit_i()
2167 if (VT == MVT::i64) in FastEmit_i()