Lines Matching refs:TII

86                         const ARMBaseInstrInfo &TII,  in isCSRestore()  argument
109 const ARMBaseInstrInfo &TII, unsigned DestReg, in emitRegPlusImmediate() argument
116 Pred, PredReg, TII, MIFlags); in emitRegPlusImmediate()
119 Pred, PredReg, TII, MIFlags); in emitRegPlusImmediate()
124 const ARMBaseInstrInfo &TII, int NumBytes, in emitSPUpdate() argument
128 emitRegPlusImmediate(isARM, MBB, MBBI, dl, TII, ARM::SP, ARM::SP, NumBytes, in emitSPUpdate()
139 const ARMBaseInstrInfo &TII = in emitPrologue() local
164 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -ArgRegsSaveSize, in emitPrologue()
169 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -NumBytes, in emitPrologue()
263 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -NumBytes, in emitPrologue()
285 emitRegPlusImmediate(!AFI->isThumbFunction(), MBB, ++FramePtrPush, dl, TII, in emitPrologue()
308 TII.get(ARM::BICri), ARM::SP) in emitPrologue()
318 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::R4) in emitPrologue()
321 TII.get(ARM::t2BICri), ARM::R4) in emitPrologue()
324 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), ARM::SP) in emitPrologue()
339 TII.get(ARM::MOVr), RegInfo->getBaseRegister()) in emitPrologue()
343 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), in emitPrologue()
364 const ARMBaseInstrInfo &TII = in emitEpilogue() local
382 emitSPUpdate(isARM, MBB, MBBI, dl, TII, NumBytes); in emitEpilogue()
389 } while (MBBI != MBB.begin() && isCSRestore(MBBI, TII, CSRegs)); in emitEpilogue()
390 if (!isCSRestore(MBBI, TII, CSRegs)) in emitEpilogue()
406 ARMCC::AL, 0, TII); in emitEpilogue()
418 ARMCC::AL, 0, TII); in emitEpilogue()
419 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), in emitEpilogue()
426 BuildMI(MBB, MBBI, dl, TII.get(ARM::MOVr), ARM::SP) in emitEpilogue()
429 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), in emitEpilogue()
434 emitSPUpdate(isARM, MBB, MBBI, dl, TII, NumBytes); in emitEpilogue()
458 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(TCOpcode)); in emitEpilogue()
472 TII.get(STI.isThumb() ? ARM::tTAILJMPr : ARM::TAILJMPr)). in emitEpilogue()
486 emitSPUpdate(isARM, MBB, MBBI, dl, TII, ArgRegsSaveSize); in emitEpilogue()
590 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); in emitPushInst() local
634 AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(StmOpc), ARM::SP) in emitPushInst()
639 MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(StrOpc), in emitPushInst()
658 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); in emitPopInst() local
702 AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(LdmOpc), ARM::SP) in emitPopInst()
717 BuildMI(MBB, MI, DL, TII.get(LdrOpc), Regs[0]) in emitPopInst()
744 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); in emitAlignedDPRCS2Spills() local
783 AddDefaultCC(AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(Opc), ARM::R4) in emitAlignedDPRCS2Spills()
790 AddDefaultCC(AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(Opc), ARM::R4) in emitAlignedDPRCS2Spills()
799 MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(Opc), ARM::SP) in emitAlignedDPRCS2Spills()
815 AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VST1d64Qwb_fixed), in emitAlignedDPRCS2Spills()
833 AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VST1d64Q)) in emitAlignedDPRCS2Spills()
845 AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VST1q64)) in emitAlignedDPRCS2Spills()
855 AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VSTRD)) in emitAlignedDPRCS2Spills()
903 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); in emitAlignedDPRCS2Restores() local
922 AddDefaultCC(AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(Opc), ARM::R4) in emitAlignedDPRCS2Restores()
932 AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VLD1d64Qwb_fixed), NextReg) in emitAlignedDPRCS2Restores()
948 AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VLD1d64Q), NextReg) in emitAlignedDPRCS2Restores()
959 AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VLD1q64), SupReg) in emitAlignedDPRCS2Restores()
967 AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VLDRD), NextReg) in emitAlignedDPRCS2Restores()
1037 const ARMBaseInstrInfo &TII) { in GetFunctionSizeInBytes() argument
1044 FnSize += TII.GetInstSizeInBytes(I); in GetFunctionSizeInBytes()
1167 const ARMBaseInstrInfo &TII = in processFunctionBeforeCalleeSavedScan() local
1267 unsigned FnSize = GetFunctionSizeInBytes(MF, TII); in processFunctionBeforeCalleeSavedScan()
1404 const ARMBaseInstrInfo &TII = in eliminateCallFramePseudoInstr() local
1433 emitSPUpdate(isARM, MBB, I, dl, TII, -Amount, MachineInstr::NoFlags, in eliminateCallFramePseudoInstr()
1439 emitSPUpdate(isARM, MBB, I, dl, TII, Amount, MachineInstr::NoFlags, in eliminateCallFramePseudoInstr()