Lines Matching refs:AGG_RD
311 #define AGG_RD(sc, regno, size) \ macro
348 while (AGG_RD(ess, PORT_CODEC_STAT, 1) & CODEC_STAT_MASK) { in agg_codec_wait4idle()
374 ret = AGG_RD(ess, PORT_CODEC_REG, 2); in agg_rdcodec()
412 data = AGG_RD(ess, PORT_RINGBUS_CTRL, 4); in ringbus_setdest()
426 return AGG_RD(ess, PORT_DSP_DATA, 2); in wp_rdreg()
441 while (AGG_RD(ess, PORT_DSP_DATA, 2) != data) { in wp_wait_data()
518 | AGG_RD(ess, PORT_HOSTINT_CTRL, 2), 2); in wp_starttimer()
526 & AGG_RD(ess, PORT_HOSTINT_CTRL, 2), 2); in wp_stoptimer()
540 return AGG_RD(ess, PORT_WAVCACHE_DATA, 2);
597 if (AGG_RD(ess, PORT_RINGBUS_CTRL, 4) & RINGBUS_CTRL_ACLINK_ENABLED) { in agg_initcodec()
613 data = AGG_RD(ess, PORT_GPIO_DIR, 2); in agg_initcodec()
616 data |= 0x009 & ~AGG_RD(ess, PORT_GPIO_DATA, 2); in agg_initcodec()
730 AGG_RD(ess, PORT_RINGBUS_CTRL_B, 1), 1); in agg_init()
749 AGG_RD(ess, PORT_GPIO_DIR, 2) | 0x600, 2); in agg_init()
780 (AGG_RD(ess, PORT_RINGBUS_CTRL, 4) in agg_power()
785 AGG_RD(ess, PORT_RINGBUS_CTRL, 4) in agg_power()
812 AGG_RD(ess, PORT_RINGBUS_CTRL, 4) in agg_power()
1244 return (AGG_RD(ess, PORT_CODEC_STAT, 1) & CODEC_STAT_MASK)? 0 : 1; in agg_ac97_init()
1642 status = AGG_RD(ess, PORT_HOSTINT_STAT, 1); in agg_intr()
1688 event = AGG_RD(ess, PORT_HWVOL_MASTER, 1); in agg_intr()
1952 icr = AGG_RD(ess, PORT_HOSTINT_CTRL, 2); in agg_detach()