Lines Matching refs:phy_reg
202 u16 phy_reg = 0; in e1000_phy_is_accessible_pchlan() local
209 ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID1, &phy_reg); in e1000_phy_is_accessible_pchlan()
210 if (ret_val || (phy_reg == 0xFFFF)) in e1000_phy_is_accessible_pchlan()
212 phy_id = (u32)(phy_reg << 16); in e1000_phy_is_accessible_pchlan()
214 ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID2, &phy_reg); in e1000_phy_is_accessible_pchlan()
215 if (ret_val || (phy_reg == 0xFFFF)) { in e1000_phy_is_accessible_pchlan()
219 phy_id |= (u32)(phy_reg & PHY_REVISION_MASK); in e1000_phy_is_accessible_pchlan()
228 hw->phy.revision = (u32)(phy_reg & ~PHY_REVISION_MASK); in e1000_phy_is_accessible_pchlan()
251 hw->phy.ops.read_reg_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_phy_is_accessible_pchlan()
252 phy_reg &= ~CV_SMB_CTRL_FORCE_SMBUS; in e1000_phy_is_accessible_pchlan()
253 hw->phy.ops.write_reg_locked(hw, CV_SMB_CTRL, phy_reg); in e1000_phy_is_accessible_pchlan()
1261 u16 phy_reg; in e1000_enable_ulp_lpt_lp() local
1307 ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_enable_ulp_lpt_lp()
1310 phy_reg |= CV_SMB_CTRL_FORCE_SMBUS; in e1000_enable_ulp_lpt_lp()
1311 e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg); in e1000_enable_ulp_lpt_lp()
1327 phy_reg = oem_reg; in e1000_enable_ulp_lpt_lp()
1328 phy_reg |= HV_OEM_BITS_LPLU | HV_OEM_BITS_GBE_DIS; in e1000_enable_ulp_lpt_lp()
1331 phy_reg); in e1000_enable_ulp_lpt_lp()
1340 ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg); in e1000_enable_ulp_lpt_lp()
1343 phy_reg |= (I218_ULP_CONFIG1_RESET_TO_SMBUS | in e1000_enable_ulp_lpt_lp()
1347 phy_reg |= I218_ULP_CONFIG1_WOL_HOST; in e1000_enable_ulp_lpt_lp()
1349 phy_reg &= ~I218_ULP_CONFIG1_WOL_HOST; in e1000_enable_ulp_lpt_lp()
1351 phy_reg |= I218_ULP_CONFIG1_STICKY_ULP; in e1000_enable_ulp_lpt_lp()
1352 phy_reg &= ~I218_ULP_CONFIG1_INBAND_EXIT; in e1000_enable_ulp_lpt_lp()
1354 phy_reg |= I218_ULP_CONFIG1_INBAND_EXIT; in e1000_enable_ulp_lpt_lp()
1355 phy_reg &= ~I218_ULP_CONFIG1_STICKY_ULP; in e1000_enable_ulp_lpt_lp()
1356 phy_reg &= ~I218_ULP_CONFIG1_WOL_HOST; in e1000_enable_ulp_lpt_lp()
1358 e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg); in e1000_enable_ulp_lpt_lp()
1366 phy_reg |= I218_ULP_CONFIG1_START; in e1000_enable_ulp_lpt_lp()
1367 e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg); in e1000_enable_ulp_lpt_lp()
1408 u16 phy_reg; in e1000_disable_ulp_lpt_lp() local
1465 ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_disable_ulp_lpt_lp()
1477 &phy_reg); in e1000_disable_ulp_lpt_lp()
1481 phy_reg &= ~CV_SMB_CTRL_FORCE_SMBUS; in e1000_disable_ulp_lpt_lp()
1482 e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg); in e1000_disable_ulp_lpt_lp()
1492 ret_val = e1000_read_phy_reg_hv_locked(hw, HV_PM_CTRL, &phy_reg); in e1000_disable_ulp_lpt_lp()
1495 phy_reg |= HV_PM_CTRL_K1_ENABLE; in e1000_disable_ulp_lpt_lp()
1496 e1000_write_phy_reg_hv_locked(hw, HV_PM_CTRL, phy_reg); in e1000_disable_ulp_lpt_lp()
1499 ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg); in e1000_disable_ulp_lpt_lp()
1502 phy_reg &= ~(I218_ULP_CONFIG1_IND | in e1000_disable_ulp_lpt_lp()
1510 e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg); in e1000_disable_ulp_lpt_lp()
1513 phy_reg |= I218_ULP_CONFIG1_START; in e1000_disable_ulp_lpt_lp()
1514 e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg); in e1000_disable_ulp_lpt_lp()
1552 u16 phy_reg; in e1000_check_for_copper_link_ich8lan() local
1618 &phy_reg); in e1000_check_for_copper_link_ich8lan()
1619 phy_reg &= ~I217_PLL_CLOCK_GATE_MASK; in e1000_check_for_copper_link_ich8lan()
1621 phy_reg |= 0x3E8; in e1000_check_for_copper_link_ich8lan()
1623 phy_reg |= 0xFA; in e1000_check_for_copper_link_ich8lan()
1626 phy_reg); in e1000_check_for_copper_link_ich8lan()
1630 &phy_reg); in e1000_check_for_copper_link_ich8lan()
1632 phy_reg |= HV_PM_CTRL_K1_CLK_REQ; in e1000_check_for_copper_link_ich8lan()
1635 phy_reg); in e1000_check_for_copper_link_ich8lan()
1765 hw->phy.ops.read_reg(hw, HV_KMRN_FIFO_CTRLSTA, &phy_reg); in e1000_check_for_copper_link_ich8lan()
1766 phy_reg &= ~HV_KMRN_FIFO_CTRLSTA_PREAMBLE_MASK; in e1000_check_for_copper_link_ich8lan()
1770 phy_reg |= (1 << HV_KMRN_FIFO_CTRLSTA_PREAMBLE_SHIFT); in e1000_check_for_copper_link_ich8lan()
1772 hw->phy.ops.write_reg(hw, HV_KMRN_FIFO_CTRLSTA, phy_reg); in e1000_check_for_copper_link_ich8lan()
2153 u16 phy_reg = 0; in e1000_update_mc_addr_list_pch2lan() local
2165 ret_val = e1000_enable_phy_wakeup_reg_access_bm(hw, &phy_reg); in e1000_update_mc_addr_list_pch2lan()
2178 e1000_disable_phy_wakeup_reg_access_bm(hw, &phy_reg); in e1000_update_mc_addr_list_pch2lan()
2700 u16 i, phy_reg = 0; in e1000_copy_rx_addrs_to_phy_ich8lan() local
2708 ret_val = e1000_enable_phy_wakeup_reg_access_bm(hw, &phy_reg); in e1000_copy_rx_addrs_to_phy_ich8lan()
2728 e1000_disable_phy_wakeup_reg_access_bm(hw, &phy_reg); in e1000_copy_rx_addrs_to_phy_ich8lan()
2761 u16 phy_reg, data; in e1000_lv_jumbo_workaround_ich8lan() local
2771 hw->phy.ops.read_reg(hw, PHY_REG(769, 20), &phy_reg); in e1000_lv_jumbo_workaround_ich8lan()
2773 phy_reg | (1 << 14)); in e1000_lv_jumbo_workaround_ich8lan()
2923 return hw->phy.ops.write_reg(hw, PHY_REG(769, 20), phy_reg & in e1000_lv_jumbo_workaround_ich8lan()
5647 u16 phy_reg, device_id = hw->device_id; in e1000_suspend_workarounds_ich8lan() local
5689 &phy_reg); in e1000_suspend_workarounds_ich8lan()
5690 phy_reg |= I217_LPI_GPIO_CTRL_AUTO_EN_LPI; in e1000_suspend_workarounds_ich8lan()
5693 phy_reg); in e1000_suspend_workarounds_ich8lan()
5708 &phy_reg); in e1000_suspend_workarounds_ich8lan()
5709 phy_reg |= I217_PROXY_CTRL_AUTO_DISABLE; in e1000_suspend_workarounds_ich8lan()
5711 phy_reg); in e1000_suspend_workarounds_ich8lan()
5716 hw->phy.ops.read_reg_locked(hw, I217_SxCTRL, &phy_reg); in e1000_suspend_workarounds_ich8lan()
5717 phy_reg |= I217_SxCTRL_ENABLE_LPI_RESET; in e1000_suspend_workarounds_ich8lan()
5718 hw->phy.ops.write_reg_locked(hw, I217_SxCTRL, phy_reg); in e1000_suspend_workarounds_ich8lan()
5721 hw->phy.ops.read_reg_locked(hw, I217_MEMPWR, &phy_reg); in e1000_suspend_workarounds_ich8lan()
5722 phy_reg &= ~I217_MEMPWR_DISABLE_SMB_RELEASE; in e1000_suspend_workarounds_ich8lan()
5723 hw->phy.ops.write_reg_locked(hw, I217_MEMPWR, phy_reg); in e1000_suspend_workarounds_ich8lan()
5729 hw->phy.ops.read_reg_locked(hw, I217_CGFREG, &phy_reg); in e1000_suspend_workarounds_ich8lan()
5730 phy_reg |= I217_CGFREG_ENABLE_MTA_RESET; in e1000_suspend_workarounds_ich8lan()
5731 hw->phy.ops.write_reg_locked(hw, I217_CGFREG, phy_reg); in e1000_suspend_workarounds_ich8lan()
5789 u16 phy_reg; in e1000_resume_workarounds_pchlan() local
5798 hw->phy.ops.read_reg_locked(hw, I217_LPI_GPIO_CTRL, &phy_reg); in e1000_resume_workarounds_pchlan()
5799 phy_reg &= ~I217_LPI_GPIO_CTRL_AUTO_EN_LPI; in e1000_resume_workarounds_pchlan()
5800 hw->phy.ops.write_reg_locked(hw, I217_LPI_GPIO_CTRL, phy_reg); in e1000_resume_workarounds_pchlan()
5808 &phy_reg); in e1000_resume_workarounds_pchlan()
5811 phy_reg |= I217_MEMPWR_DISABLE_SMB_RELEASE; in e1000_resume_workarounds_pchlan()
5812 hw->phy.ops.write_reg_locked(hw, I217_MEMPWR, phy_reg); in e1000_resume_workarounds_pchlan()
5819 &phy_reg); in e1000_resume_workarounds_pchlan()
5822 phy_reg &= ~I217_CGFREG_ENABLE_MTA_RESET; in e1000_resume_workarounds_pchlan()
5823 hw->phy.ops.write_reg_locked(hw, I217_CGFREG, phy_reg); in e1000_resume_workarounds_pchlan()